From 9da4a9ec6a924c840c2ae267014b61cb8978f226 Mon Sep 17 00:00:00 2001 From: Maxim Poliakovski Date: Mon, 14 Feb 2022 23:06:07 +0100 Subject: [PATCH] SWIM3: respect interrupt enable flag in mode register. --- devices/floppy/swim3.cpp | 10 ++++++---- devices/floppy/swim3.h | 1 + 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/devices/floppy/swim3.cpp b/devices/floppy/swim3.cpp index b6333b3..c2da74e 100644 --- a/devices/floppy/swim3.cpp +++ b/devices/floppy/swim3.cpp @@ -171,10 +171,12 @@ void Swim3Ctrl::write(uint8_t reg_offset, uint8_t value) void Swim3Ctrl::update_irq() { - uint8_t new_irq = !!(this->int_flags & this->int_mask); - if (new_irq != this->irq) { - this->irq = new_irq; - this->int_ctrl->ack_int(this->irq_id, new_irq); + if (this->mode_reg & SWIM3_INT_ENA) { + uint8_t new_irq = !!(this->int_flags & this->int_mask); + if (new_irq != this->irq) { + this->irq = new_irq; + this->int_ctrl->ack_int(this->irq_id, new_irq); + } } } diff --git a/devices/floppy/swim3.h b/devices/floppy/swim3.h index d6050bc..2b5a154 100644 --- a/devices/floppy/swim3.h +++ b/devices/floppy/swim3.h @@ -55,6 +55,7 @@ enum Swim3Reg : uint8_t { /** Mode register bits. */ enum { + SWIM3_INT_ENA = 0x01, SWIM3_GO = 0x08, SWIM3_WR_MODE = 0x10, SWIM3_GO_STEP = 0x80,