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SWIM3: respect interrupt enable flag in mode register.
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@ -171,10 +171,12 @@ void Swim3Ctrl::write(uint8_t reg_offset, uint8_t value)
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void Swim3Ctrl::update_irq()
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void Swim3Ctrl::update_irq()
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{
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{
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uint8_t new_irq = !!(this->int_flags & this->int_mask);
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if (this->mode_reg & SWIM3_INT_ENA) {
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if (new_irq != this->irq) {
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uint8_t new_irq = !!(this->int_flags & this->int_mask);
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this->irq = new_irq;
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if (new_irq != this->irq) {
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this->int_ctrl->ack_int(this->irq_id, new_irq);
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this->irq = new_irq;
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this->int_ctrl->ack_int(this->irq_id, new_irq);
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}
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}
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}
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}
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}
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@ -55,6 +55,7 @@ enum Swim3Reg : uint8_t {
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/** Mode register bits. */
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/** Mode register bits. */
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enum {
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enum {
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SWIM3_INT_ENA = 0x01,
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SWIM3_GO = 0x08,
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SWIM3_GO = 0x08,
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SWIM3_WR_MODE = 0x10,
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SWIM3_WR_MODE = 0x10,
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SWIM3_GO_STEP = 0x80,
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SWIM3_GO_STEP = 0x80,
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