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Documentation update - Aug. 11, 2024

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2
zdocs/developers/adb.md
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@ -2,6 +2,8 @@ The Apple Desktop Bus is a bit-serial peripheral bus, Apple themselves cited a 2
The device commands are in the form of single byte strings. The first four bits are to signal which of the 16 devices are to be used. The next two bits are for which action to execute (talk, listen, flush, or reset). These are followed by two bits which determine the register to reference (register 0 is usually a communications register, while register 3 is used for device info).
Heathrow and Paddington-based Macintoshes have a Master Cell, which is a fully-featured ADB implementation for hardware, but isn't used by Mac OS itself.
# Commands
| Command Name | Number |

2
zdocs/developers/cpu/powerpc/mmuemu.md
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@ -84,7 +84,7 @@ are exceptions from this rule, for example, video memory.
When no translation for a virtual address was found in either cache, a full address
translation including the full page table walk is performed. This path is the
slowest one. Fortunately, the probabilty that this path will be taken seems to be
slowest one. Fortunately, the probability that this path will be taken seems to be
very low.
The complete algorithm looks like that:

8
zdocs/developers/dbdma.md
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@ -14,14 +14,22 @@ The Description-Based Direct Memory Access (DBDMA) relies on memory-based descri
| AUDIO IN | 0x9 |
| SCSI1 | 0xA |
What's notable about the registers is that they are in little-endian format.
| Register | Offset |
|:-----------------:|:------:|
| ChannelControl | 0x00 |
| ChannelStatus | 0x04 |
| CommandPtrHi | 0x08 |
| CommandPtrLo | 0x0C |
| InterruptSelect | 0x10 |
| BranchSelect | 0x14 |
| WaitSelect | 0x18 |
| TransferMode | 0x1C |
| Data2PtrHi | 0x20 |
| Data2PtrLo | 0x24 |
| BranchPtrHi | 0x2C |
| BranchPtrLo | 0x30 |
| Command | Value |
|:-----------------:|:------:|

2
zdocs/developers/get-inherited-property notes.txt
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@ -282,7 +282,7 @@ from "Writing FCode Programs For PCI"
\ in the PCI node. If the add-range method is present in an Apple ROM, the map-in
\ method is broken. If the add-range property is absent, the map-in method behaves
\ correctly.
\ The following methods allow the FCode driver to accomodate both broken and working
\ The following methods allow the FCode driver to accommodate both broken and working
\ map-in methods.
: map-in-broken? ( -- flag )

28
zdocs/developers/misc.md
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@ -14,7 +14,7 @@ For serial, it replicates the functionality of a Zilog ESCC. There are two diffe
The NCR 53C94 is the SCSI controller.
# Register Map
## Register Map
| Offset | Read functionality |Write functionality |
|:------:|:------------------------:|:-------------------------:|
@ -33,18 +33,6 @@ The NCR 53C94 is the SCSI controller.
| 0xC | Configuration 3 | Configuration 3 |
| 0xF | | Reserve FIFO Byte (Cfg 2) |
# SWIM 3
The SWIM 3 (Sanders-Wozniak integrated machine 3) is the floppy drive disk controller. As can be inferred by the name, the SWIM III chip is the improvement of a combination of floppy disk driver designs by Steve Wozniak (who worked on his own floppy drive controller for early Apple computers) and Wendell B. Sander (who worked on an MFM-compatible IBM floppy drive controller).
The SWIM chip is resided on the logic board physically and is located at IOBase + 0x15000 in the device tree. It sits between the I/O controller and the floppy disk connector. Its function is to translate the I/O commands to specialized signals to drive the floppy disk drive, i.e. disk spinning speed, head position, phase sync, etc.
Unlike its predecessor, it allowed some DMA capability.
The floppy drives themselves were provided by Sony.
Some New World Macs do have a SWIM 3 driver present, but this normally goes unused due to no floppy drive being connected.
# NVRAM
Mac OS relies on 8 KB of NVRAM at minimum to run properly. It's usually found at IOBase (ex.: 0xF3000000 for Power Mac G3 Beige) + 0x60000.
@ -55,15 +43,21 @@ On a physical machine, one has to hold the Command/Apple, Option, P and R keys t
| Command Name | Number | Functionality |
|:----------------:|:------:|:----------------------------:|
| PMUpowerCntl | 0x10 | Power Plane/Clock Control |
| kPMUpowerRead | 0x18 | Turns ADB auto-polling off |
| PMUpMgrADB | 0x20 | Send ADB command |
| PMUpMgrADBoff | 0x21 |
| PMUpMgrADBoff | 0x21 | Turns ADB auto-polling off |
| PMUxPramWrite | 0x32 |
| PMUtimeRead | 0x38 |
| PMUtimeRead | 0x38 | Read time from clock
| PMUxPramRead | 0x3A |
| PMUmaskInts | 0x70 |
| PMUreadINT | 0x78 |
| PMUPmgrPWRoff | 0x7E |
| PMUsleepReq | 0x7F |
| PMUResetCPU | 0xD0 |
| PMUwritePmgrRAM | 0xE0 |
| PMUdownloadStatus| 0xE2 |
| PMUreadPmgrRAM | 0xE8 |
# DACula
@ -71,7 +65,7 @@ This video RAMDAC appears to be exclusive to the Power Mac 7200.
# USB
Support is only present in New World Macs, despite the presence of strings in the Power Mac G3 Beige ROM. Most Macs support 1.1, with 2.0 support present in G5 Macs.
Support is only present in New World Macs, despite the presence of strings in the Power Mac G3 Beige ROM. Most Macs support 1.1, with 2.0 support present in G5 Macs. Both it and Firewire follow the Open Host Controller Interface (OHCI) standard.
# FireWire
@ -79,6 +73,6 @@ Present in several New World Macs is a FireWire controller. Mac OS Classic norma
# Miscellaneous
* In order for the mouse to move, it generally needs to use the Vertical Blanking Interrupt (VBL) present on the video controller. However, the Pippin instead uses a virtual timer task to accomplish, as there is a bug that prevents the VBL from working in the Taos graphics controller.
* In order for the mouse to move, it generally needs to use the Vertical Blanking Interrupt (VBL) present on the video controller. However, the Pippin instead uses a virtual timer task to accomplish this, as there is a bug that prevents the VBL from working in the Taos graphics controller.
* The Power Mac G3 Beige has an additional register at 0xFF000004, which is dubbed varyingly as the "cpu-id" (by Open Firmware), the ""systemReg" (display driver) or "MachineID" (platform driver).

8
zdocs/developers/openfirmware.md
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@ -18,7 +18,7 @@ widely used in the PC world.
Being based upon the [Forth programming language](https://en.wikipedia.org/wiki/Forth_(programming_language)),
Open Firmware offers an operating system, an interactive environment as well as a
programming language in one package. Its shell can be used as well by users for
controlling the boot enviroment as by developers for developing and debugging device
controlling the boot environment as by developers for developing and debugging device
drivers.
This document focuses on various aspects of Apple's Open Firmware implementation
@ -61,7 +61,7 @@ as found in various Power Macintosh models.
### Old World Macs
Open Firmware in OldWorld Macs is stored in the monolithic 4MB ROM. Its hibernated
Open Firmware in Old World Macs is stored in the monolithic 4MB ROM. Its hibernated
image is located at offset `0x320000` or `0x330000` from beginning of the ROM.
That corresponds to the physical address `0xFFF20000` or `0xFFF30000`, respectively.
@ -249,7 +249,7 @@ Apple's Open Firmware contains a small kernel implemented in the native PowerPC
1. In response to power coming on, HWInit code in the Power Macintosh ROM performs initialization of the memory controller and the basic I/O facilities as well as some self-testing. After that, the startup chime is played.
2. HWInit passes control to Open Firmware kernel that prepares OF execution from RAM. OF builds the **device tree** - a platform-independent description of the attached HW.
3. OF returns control to HWInit that initializes several low-level data structures required by the Nanokernel.
4. HWInit passes control to the Nanokernel that initializes the native execution enviroment and the 68k emulator.
4. HWInit passes control to the Nanokernel that initializes the native execution environment and the 68k emulator.
5. 68k emulator executes the start-up code in the Macintosh ROM that initializes various managers.
6. The device tree generated by the Open Firmware in step 2 is imported by the Expansion Bus Manager initialization code and stored in the **NameRegistry**.
7. An operating system is located and loaded.
@ -260,7 +260,7 @@ Apple's Open Firmware contains a small kernel implemented in the native PowerPC
## Open Firmware bugs
Apple OF is known to contain numerous bugs. The following table lists some recently discrovered bugs, not mentioned elsewhere.
Apple OF is known to contain numerous bugs. The following table lists some recently discovered bugs, not mentioned elsewhere.
| OF version affected | Bug description |
|:-------------------:|-----------------|

32
zdocs/developers/swim3.md Normal file
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@ -0,0 +1,32 @@
The SWIM 3 (Sanders-Wozniak integrated machine 3) is the floppy drive disk controller. As can be inferred by the name, the SWIM III chip is the improvement of a combination of floppy disk driver designs by Steve Wozniak (who worked on his own floppy drive controller for early Apple computers) and Wendell B. Sander (who worked on an MFM-compatible IBM floppy drive controller).
The original SWIM chip supported Group Coded Recording (GCR)-formatted floppy disks in 400 kb and 800 kb formats, while the newer SWIM2 and SWIM3 chips include support for 1.44 MB floppies in MFM format.
The SWIM chip is resided on the logic board physically and is located at IOBase + 0x15000 in the device tree. It sits between the I/O controller and the floppy disk connector. Its function is to translate the I/O commands to specialized signals to drive the floppy disk drive, i.e. disk spinning speed, head position, phase sync, etc.
Unlike its predecessors, it allowed some DMA capability to transfer read or write data.
The floppy drives themselves were provided by Sony.
Some New World Macs such as Rev. A iMac G3s do have a SWIM 3 driver present, but this normally goes unused due to no floppy drive being connected.
# Registers
| Offset | Functionality |
|:------:|:-------------------------------:|
| 0x0 | Data |
| 0x1 | Timer |
| 0x2 | Error |
| 0x3 | Parameter Data |
| 0x4 | Phase |
| 0x5 | Setup |
| 0x6 | Read Mode (Read), Mode (Write) |
| 0x7 | Handshake (Read), Mode (Write) |
| 0x8 | Interrupt |
| 0x9 | Step |
| 0xA | Current Track |
| 0xB | Current Sector |
| 0xC | Gap/Format |
| 0xD | First Sector |
| 0xE | Sectors to Transfer |
| 0xF | Interrupt Mask |

2
zdocs/users/manual.md
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@ -28,7 +28,7 @@ DingusPPC is operated using the command line interface. As such, we will list th
-r, --realtime
```
Run the emulator in runtime (using the interpeter).
Run the emulator in runtime (using the interpreter).
```
-d, --debugger