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Preliminary DBDMA expansion
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@ -331,6 +331,17 @@ uint8_t* mmu_get_dma_mem(uint32_t addr, uint32_t size, bool* is_writable)
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}
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}
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void mmu_dma_store_quad(uint32_t addr, uint32_t value) {
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mmu_write_vmem<uint32_t>(ppc_effective_address, value);
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}
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uint8_t* mmu_dma_load_quad(uint32_t addr) {
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uint32_t ret_value = mmu_read_vmem<uint32_t>(addr);
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uint8_t ret_array[4] = {(uint8_t)ret_value, (uint8_t)(ret_value >> 8), (uint8_t)(ret_value >> 16), (uint8_t)(ret_value >> 24)};
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return ret_array;
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}
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// primary ITLB for all MMU modes
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static std::array<TLBEntry, TLB_SIZE> itlb1_mode1;
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static std::array<TLBEntry, TLB_SIZE> itlb1_mode2;
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@ -107,6 +107,8 @@ extern std::function<void(uint32_t bat_reg)> ibat_update;
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extern std::function<void(uint32_t bat_reg)> dbat_update;
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extern uint8_t* mmu_get_dma_mem(uint32_t addr, uint32_t size, bool* is_writable);
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extern void mmu_dma_store_quad(uint32_t addr, uint32_t value);
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extern uint8_t* mmu_dma_load_quad(uint32_t addr);
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extern void mmu_change_mode(void);
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extern void mmu_pat_ctx_changed();
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@ -116,10 +116,33 @@ uint8_t DMAChannel::interpret_cmd() {
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this->cmd_in_progress = true;
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break;
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case DBDMA_Cmd::STORE_QUAD:
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LOG_F(ERROR, "Unsupported DMA Command STORE_QUAD");
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if (cmd_struct.cmd_key != 6) {
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LOG_F(ERROR, "Illegal key value for STORE_QUAD");
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}
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else {
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if (cmd_struct.req_count & 0x4) {
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cmd_struct.req_count = 4;
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}
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else if (cmd_struct.req_count & 0x2) {
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cmd_struct.req_count = 2;
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}
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else {
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cmd_struct.req_count = 1;
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}
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mmu_dma_store_quad(cmd_struct.address, cmd_struct.cmd_arg);
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this->queue_len = 4;
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this->cmd_in_progress = true;
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}
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break;
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case DBDMA_Cmd::LOAD_QUAD:
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LOG_F(ERROR, "Unsupported DMA Command LOAD_QUAD");
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if (cmd_struct.cmd_key != 6) {
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LOG_F(ERROR, "Illegal key value for LOAD_QUAD");
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} else {
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this->queue_data = mmu_dma_load_quad(cmd_struct.address);
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this->queue_len = 4;
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this->cmd_in_progress = true;
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}
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break;
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case DBDMA_Cmd::NOP:
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LOG_F(ERROR, "Unsupported DMA Command NOP");
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