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escc: WR9 fixes.

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Update write_regs[WR9] even though most or all of the bits are in master_int_cntrl.
Fix hardware reset for WR9. It's supposed to leave WR9_NO_VECTOR | WR9_VECTOR_INCLUDES_STATUS unchanged.
Fix channel reset for WR9. It's supposed to clear WR9_INTERRUPT_MASKING_WITHOUT_INTACK.
This commit is contained in:
joevt 2024-04-26 20:14:19 -07:00 committed by dingusdev
parent 82e22174d6
commit b60d3061b7
1 changed files with 4 additions and 1 deletions
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5
devices/serial/escc.cpp
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@ -66,7 +66,7 @@ EsccController::EsccController()
void EsccController::reset()
{
this->master_int_cntrl &= ~(WR9_NO_VECTOR | WR9_VECTOR_INCLUDES_STATUS);
this->master_int_cntrl &= (WR9_NO_VECTOR | WR9_VECTOR_INCLUDES_STATUS);
this->master_int_cntrl |= WR9_FORCE_HARDWARE_RESET;
this->reg_ptr = WR0; // or RR0
@ -240,10 +240,13 @@ void EsccChannel::reset(bool hw_reset)
this->brg_clock_src = 0;
if (hw_reset) {
this->write_regs[WR9] &= 0x03; // clear all except (WR9_NO_VECTOR | WR9_VECTOR_INCLUDES_STATUS)
this->write_regs[WR9] |= 0xC0; // set WR9_FORCE_HARDWARE_RESET
this->write_regs[WR10] = 0;
this->write_regs[WR11] = 8;
this->write_regs[WR14] &= 0xC0;
} else {
this->write_regs[WR9] &= ~0x20; // clear WR9_INTERRUPT_MASKING_WITHOUT_INTACK
this->write_regs[WR10] &= 0x60;
this->write_regs[WR14] &= 0xC3;
}