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Added recognition for most devices
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devices/escc.cpp
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64
devices/escc.cpp
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/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-20 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "escc.h"
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#include <cinttypes>
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#include <thirdparty/loguru/loguru.hpp>
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using namespace std;
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ESCC::ESCC() {}
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ESCC::~ESCC() {}
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uint8_t ESCC::escc_read(uint32_t offset, int size) {
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return 0;
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}
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void ESCC::escc_write(uint32_t offset, uint8_t value, int size) {
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if (offset == 0x20) {
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if (!prep_value) {
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store_reg = value & 0xF;
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prep_value = true;
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}
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else {
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escc_reg[store_reg] = value;
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prep_value = false;
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}
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}
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}
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uint8_t ESCC::escc_legacy_read(uint32_t offset, int size) {
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return 0;
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}
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void ESCC::escc_legacy_write(uint32_t offset, uint8_t value, int size) {
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if (offset == 0x0) {
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if (!prep_value) {
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store_reg = value & 0xF;
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prep_value = true;
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} else {
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escc_reg[store_reg] = value;
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prep_value = false;
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}
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}
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}
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47
devices/escc.h
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47
devices/escc.h
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/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-20 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef ESCC_H
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#define ESCC_H
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#include <cinttypes>
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class ESCC {
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public:
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ESCC();
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~ESCC();
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//protected:
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uint8_t escc_read(uint32_t offset, int size);
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void escc_write(uint32_t offset, uint8_t value, int size);
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uint8_t escc_legacy_read(uint32_t offset, int size);
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void escc_legacy_write(uint32_t offset, uint8_t value, int size);
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private:
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uint8_t escc_reg[16];
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uint8_t store_reg = 0;
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bool prep_value = false;
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};
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#endif /* ESCC_H */
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@ -21,6 +21,7 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
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#include "awacs.h"
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#include "dbdma.h"
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#include "escc.h"
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#include "machines/machinebase.h"
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#include "macio.h"
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#include "viacuda.h"
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@ -44,6 +45,8 @@ HeathrowIC::HeathrowIC() : PCIDevice("mac-io/heathrow") {
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this->screamer = new AWACDevice();
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this->snd_out_dma = new DMAChannel(this->screamer);
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this->screamer->set_dma_out(this->snd_out_dma);
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this->escc = new ESCC();
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}
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HeathrowIC::~HeathrowIC() {
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@ -121,13 +124,37 @@ uint32_t HeathrowIC::read(uint32_t reg_start, uint32_t offset, int size) {
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case 8:
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res = dma_read(offset - 0x8000, size);
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break;
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case 0x10:
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LOG_F(WARNING, "SCSI Read - Offset: %x; Size: %x\n", offset, size);
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res = 0; // TEMP!!!
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break;
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case 0x11:
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LOG_F(WARNING, "BMAC Read - Offset: %x; Size: %x\n", offset, size);
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res = 0; // TEMP!!!
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break;
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case 0x12:
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//LOG_F(WARNING, "LEGACY ESCC Read - Offset: %x; Size: %x\n", offset, size);
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res = 0xc0; // TEMP!!!
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break;
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case 0x13:
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LOG_F(WARNING, "ESCC Read - Offset: %x; Size: %x\n", offset, size);
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res = 0; // TEMP!!!
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break;
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case 0x14:
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res = this->screamer->snd_ctrl_read(offset - 0x14000, size);
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break;
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case 0x15:
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LOG_F(WARNING, "SWIM 3 Read - Offset: %x; Size: %x\n", offset, size);
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res = 0; // TEMP!!!
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break;
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case 0x16:
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case 0x17:
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res = this->viacuda->read((offset - 0x16000) >> 9);
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break;
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case 0x20:
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LOG_F(WARNING, "IDE Read - Offset: %x; Size: %x\n", offset, size);
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res = 0; // TEMP!!!
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break;
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default:
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if (sub_addr >= 0x60) {
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res = this->nvram->read_byte((offset - 0x60000) >> 4);
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@ -151,13 +178,31 @@ void HeathrowIC::write(uint32_t reg_start, uint32_t offset, uint32_t value, int
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case 8:
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dma_write(offset - 0x8000, value, size);
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break;
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case 0x10:
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LOG_F(WARNING, "SCSI Write - Offset: %x; Value: %x; Size: %x\n", offset, value, size);
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break;
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case 0x11:
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LOG_F(WARNING, "BMAC Write - Offset: %x; Value: %x; Size: %x\n", offset, value, size);
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break;
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case 0x12:
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LOG_F(WARNING, "LEGACY ESCC Write - Offset: %x; Value: %x; Size: %x\n", offset, value, size);
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break;
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case 0x13:
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this->escc->escc_write((offset - 0x13000), value, size);
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break;
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case 0x14:
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this->screamer->snd_ctrl_write(offset - 0x14000, value, size);
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break;
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case 0x15:
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LOG_F(WARNING, "SWIM 3 Write - Offset: %x; Value: %x; Size: %x\n", offset, value, size);
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break;
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case 0x16:
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case 0x17:
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this->viacuda->write((offset - 0x16000) >> 9, value);
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break;
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case 0x20:
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LOG_F(WARNING, "IDE Write - Offset: %x; Value: %x; Size: %x\n", offset, value, size);
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break;
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default:
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if (sub_addr >= 0x60) {
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this->nvram->write_byte((offset - 0x60000) >> 4, value);
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@ -171,6 +216,10 @@ uint32_t HeathrowIC::mio_ctrl_read(uint32_t offset, int size) {
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uint32_t res = 0;
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switch (offset & 0xFF) {
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case 0x10:
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LOG_F(9, "read from MIO:Int_Events2 register \n");
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res = this->int_events2;
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break;
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case 0x14:
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LOG_F(9, "read from MIO:Int_Mask2 register \n");
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res = this->int_mask2;
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@ -183,6 +232,10 @@ uint32_t HeathrowIC::mio_ctrl_read(uint32_t offset, int size) {
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LOG_F(9, "read from MIO:Int_Levels2 register \n");
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res = this->int_levels2;
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break;
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case 0x20:
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LOG_F(9, "read from MIO:Int_Events2 register \n");
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res = this->int_events2;
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break;
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case 0x24:
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LOG_F(9, "read from MIO:Int_Mask1 register \n");
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res = this->int_mask1;
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@ -212,18 +265,26 @@ uint32_t HeathrowIC::mio_ctrl_read(uint32_t offset, int size) {
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void HeathrowIC::mio_ctrl_write(uint32_t offset, uint32_t value, int size) {
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switch (offset & 0xFF) {
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case 0x10:
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LOG_F(9, "write %x from MIO:Int_Events2 register \n", value);
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this->int_events2 = value;
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break;
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case 0x14:
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LOG_F(9, "read from MIO:Int_Mask2 register \n");
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LOG_F(9, "write %x from MIO:Int_Mask2 register \n", value);
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this->int_mask2 = value;
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break;
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case 0x18:
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LOG_F(9, "read from MIO:Int_Clear2 register \n");
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LOG_F(9, "write %x from MIO:Int_Clear2 register \n", value);
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this->int_clear2 = value;
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break;
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case 0x1C:
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LOG_F(9, "read from MIO:Int_Levels2 register \n");
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LOG_F(9, "write %x from MIO:Int_Levels2 register \n", value);
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this->int_levels2 = value;
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break;
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case 0x20:
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LOG_F(9, "write %x from MIO:Int_Events1 register \n", value);
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this->int_events1 = value;
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break;
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case 0x24:
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LOG_F(9, "write %x to MIO:Int_Mask1 register \n", value);
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this->int_mask1 = value;
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@ -233,7 +294,7 @@ void HeathrowIC::mio_ctrl_write(uint32_t offset, uint32_t value, int size) {
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this->int_clear1 = value;
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break;
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case 0x2C:
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LOG_F(9, "read from MIO:Int_Levels1 register \n");
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LOG_F(9, "write %x to MIO:Int_Levels1 register \n", value);
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this->int_levels1 = value;
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break;
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case 0x38:
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@ -53,6 +53,7 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
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#include "awacs.h"
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#include "dbdma.h"
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#include "escc.h"
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#include "hwcomponent.h"
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#include "memctrlbase.h"
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#include "mmiodevice.h"
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@ -135,9 +136,11 @@ private:
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0x00 // unknown defaults
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};
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uint32_t int_events2 = 0;
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uint32_t int_mask2 = 0;
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uint32_t int_clear2 = 0;
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uint32_t int_levels2 = 0;
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uint32_t int_events1 = 0;
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uint32_t int_mask1 = 0;
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uint32_t int_clear1 = 0;
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uint32_t int_levels1 = 0;
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@ -147,6 +150,7 @@ private:
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ViaCuda* viacuda; /* VIA cell with Cuda MCU attached to it */
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NVram* nvram; /* NVRAM cell */
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AWACDevice* screamer; /* Screamer audio codec instance */
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ESCC* escc; /* Screamer audio codec instance */
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DMAChannel* snd_out_dma;
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};
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