From b7d45b1a318d1c0f6fe356a74fc0c28e88e40631 Mon Sep 17 00:00:00 2001 From: dingusdev Date: Mon, 7 Dec 2020 07:57:44 -0700 Subject: [PATCH] Added recognition for most devices --- devices/escc.cpp | 64 ++++++++++++++++++++++++++++++++++++++++ devices/escc.h | 47 ++++++++++++++++++++++++++++++ devices/heathrow.cpp | 69 +++++++++++++++++++++++++++++++++++++++++--- devices/macio.h | 4 +++ 4 files changed, 180 insertions(+), 4 deletions(-) create mode 100644 devices/escc.cpp create mode 100644 devices/escc.h diff --git a/devices/escc.cpp b/devices/escc.cpp new file mode 100644 index 0000000..983db18 --- /dev/null +++ b/devices/escc.cpp @@ -0,0 +1,64 @@ +/* +DingusPPC - The Experimental PowerPC Macintosh emulator +Copyright (C) 2018-20 divingkatae and maximum + (theweirdo) spatium + +(Contact divingkatae#1017 or powermax#2286 on Discord for more info) + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . +*/ + +#include "escc.h" +#include +#include + +using namespace std; + + +ESCC::ESCC() {} + +ESCC::~ESCC() {} + +uint8_t ESCC::escc_read(uint32_t offset, int size) { + return 0; +} + +void ESCC::escc_write(uint32_t offset, uint8_t value, int size) { + if (offset == 0x20) { + if (!prep_value) { + store_reg = value & 0xF; + prep_value = true; + } + else { + escc_reg[store_reg] = value; + prep_value = false; + } + } +} + +uint8_t ESCC::escc_legacy_read(uint32_t offset, int size) { + return 0; +} + +void ESCC::escc_legacy_write(uint32_t offset, uint8_t value, int size) { + if (offset == 0x0) { + if (!prep_value) { + store_reg = value & 0xF; + prep_value = true; + } else { + escc_reg[store_reg] = value; + prep_value = false; + } + } +} \ No newline at end of file diff --git a/devices/escc.h b/devices/escc.h new file mode 100644 index 0000000..1280570 --- /dev/null +++ b/devices/escc.h @@ -0,0 +1,47 @@ +/* +DingusPPC - The Experimental PowerPC Macintosh emulator +Copyright (C) 2018-20 divingkatae and maximum + (theweirdo) spatium + +(Contact divingkatae#1017 or powermax#2286 on Discord for more info) + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . +*/ + +#ifndef ESCC_H +#define ESCC_H + +#include + +class ESCC { +public: + ESCC(); + ~ESCC(); + +//protected: + uint8_t escc_read(uint32_t offset, int size); + void escc_write(uint32_t offset, uint8_t value, int size); + + uint8_t escc_legacy_read(uint32_t offset, int size); + void escc_legacy_write(uint32_t offset, uint8_t value, int size); + +private: + uint8_t escc_reg[16]; + + uint8_t store_reg = 0; + + bool prep_value = false; +}; + +#endif /* ESCC_H */ diff --git a/devices/heathrow.cpp b/devices/heathrow.cpp index 1fe507f..03c3061 100644 --- a/devices/heathrow.cpp +++ b/devices/heathrow.cpp @@ -21,6 +21,7 @@ along with this program. If not, see . #include "awacs.h" #include "dbdma.h" +#include "escc.h" #include "machines/machinebase.h" #include "macio.h" #include "viacuda.h" @@ -44,6 +45,8 @@ HeathrowIC::HeathrowIC() : PCIDevice("mac-io/heathrow") { this->screamer = new AWACDevice(); this->snd_out_dma = new DMAChannel(this->screamer); this->screamer->set_dma_out(this->snd_out_dma); + + this->escc = new ESCC(); } HeathrowIC::~HeathrowIC() { @@ -121,13 +124,37 @@ uint32_t HeathrowIC::read(uint32_t reg_start, uint32_t offset, int size) { case 8: res = dma_read(offset - 0x8000, size); break; + case 0x10: + LOG_F(WARNING, "SCSI Read - Offset: %x; Size: %x\n", offset, size); + res = 0; // TEMP!!! + break; + case 0x11: + LOG_F(WARNING, "BMAC Read - Offset: %x; Size: %x\n", offset, size); + res = 0; // TEMP!!! + break; + case 0x12: + //LOG_F(WARNING, "LEGACY ESCC Read - Offset: %x; Size: %x\n", offset, size); + res = 0xc0; // TEMP!!! + break; + case 0x13: + LOG_F(WARNING, "ESCC Read - Offset: %x; Size: %x\n", offset, size); + res = 0; // TEMP!!! + break; case 0x14: res = this->screamer->snd_ctrl_read(offset - 0x14000, size); break; + case 0x15: + LOG_F(WARNING, "SWIM 3 Read - Offset: %x; Size: %x\n", offset, size); + res = 0; // TEMP!!! + break; case 0x16: case 0x17: res = this->viacuda->read((offset - 0x16000) >> 9); break; + case 0x20: + LOG_F(WARNING, "IDE Read - Offset: %x; Size: %x\n", offset, size); + res = 0; // TEMP!!! + break; default: if (sub_addr >= 0x60) { res = this->nvram->read_byte((offset - 0x60000) >> 4); @@ -151,13 +178,31 @@ void HeathrowIC::write(uint32_t reg_start, uint32_t offset, uint32_t value, int case 8: dma_write(offset - 0x8000, value, size); break; + case 0x10: + LOG_F(WARNING, "SCSI Write - Offset: %x; Value: %x; Size: %x\n", offset, value, size); + break; + case 0x11: + LOG_F(WARNING, "BMAC Write - Offset: %x; Value: %x; Size: %x\n", offset, value, size); + break; + case 0x12: + LOG_F(WARNING, "LEGACY ESCC Write - Offset: %x; Value: %x; Size: %x\n", offset, value, size); + break; + case 0x13: + this->escc->escc_write((offset - 0x13000), value, size); + break; case 0x14: this->screamer->snd_ctrl_write(offset - 0x14000, value, size); break; + case 0x15: + LOG_F(WARNING, "SWIM 3 Write - Offset: %x; Value: %x; Size: %x\n", offset, value, size); + break; case 0x16: case 0x17: this->viacuda->write((offset - 0x16000) >> 9, value); break; + case 0x20: + LOG_F(WARNING, "IDE Write - Offset: %x; Value: %x; Size: %x\n", offset, value, size); + break; default: if (sub_addr >= 0x60) { this->nvram->write_byte((offset - 0x60000) >> 4, value); @@ -171,6 +216,10 @@ uint32_t HeathrowIC::mio_ctrl_read(uint32_t offset, int size) { uint32_t res = 0; switch (offset & 0xFF) { + case 0x10: + LOG_F(9, "read from MIO:Int_Events2 register \n"); + res = this->int_events2; + break; case 0x14: LOG_F(9, "read from MIO:Int_Mask2 register \n"); res = this->int_mask2; @@ -183,6 +232,10 @@ uint32_t HeathrowIC::mio_ctrl_read(uint32_t offset, int size) { LOG_F(9, "read from MIO:Int_Levels2 register \n"); res = this->int_levels2; break; + case 0x20: + LOG_F(9, "read from MIO:Int_Events2 register \n"); + res = this->int_events2; + break; case 0x24: LOG_F(9, "read from MIO:Int_Mask1 register \n"); res = this->int_mask1; @@ -212,18 +265,26 @@ uint32_t HeathrowIC::mio_ctrl_read(uint32_t offset, int size) { void HeathrowIC::mio_ctrl_write(uint32_t offset, uint32_t value, int size) { switch (offset & 0xFF) { + case 0x10: + LOG_F(9, "write %x from MIO:Int_Events2 register \n", value); + this->int_events2 = value; + break; case 0x14: - LOG_F(9, "read from MIO:Int_Mask2 register \n"); + LOG_F(9, "write %x from MIO:Int_Mask2 register \n", value); this->int_mask2 = value; break; case 0x18: - LOG_F(9, "read from MIO:Int_Clear2 register \n"); + LOG_F(9, "write %x from MIO:Int_Clear2 register \n", value); this->int_clear2 = value; break; case 0x1C: - LOG_F(9, "read from MIO:Int_Levels2 register \n"); + LOG_F(9, "write %x from MIO:Int_Levels2 register \n", value); this->int_levels2 = value; break; + case 0x20: + LOG_F(9, "write %x from MIO:Int_Events1 register \n", value); + this->int_events1 = value; + break; case 0x24: LOG_F(9, "write %x to MIO:Int_Mask1 register \n", value); this->int_mask1 = value; @@ -233,7 +294,7 @@ void HeathrowIC::mio_ctrl_write(uint32_t offset, uint32_t value, int size) { this->int_clear1 = value; break; case 0x2C: - LOG_F(9, "read from MIO:Int_Levels1 register \n"); + LOG_F(9, "write %x to MIO:Int_Levels1 register \n", value); this->int_levels1 = value; break; case 0x38: diff --git a/devices/macio.h b/devices/macio.h index f06bd77..dd64563 100644 --- a/devices/macio.h +++ b/devices/macio.h @@ -53,6 +53,7 @@ along with this program. If not, see . #include "awacs.h" #include "dbdma.h" +#include "escc.h" #include "hwcomponent.h" #include "memctrlbase.h" #include "mmiodevice.h" @@ -135,9 +136,11 @@ private: 0x00 // unknown defaults }; + uint32_t int_events2 = 0; uint32_t int_mask2 = 0; uint32_t int_clear2 = 0; uint32_t int_levels2 = 0; + uint32_t int_events1 = 0; uint32_t int_mask1 = 0; uint32_t int_clear1 = 0; uint32_t int_levels1 = 0; @@ -147,6 +150,7 @@ private: ViaCuda* viacuda; /* VIA cell with Cuda MCU attached to it */ NVram* nvram; /* NVRAM cell */ AWACDevice* screamer; /* Screamer audio codec instance */ + ESCC* escc; /* Screamer audio codec instance */ DMAChannel* snd_out_dma; };