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https://github.com/dingusdev/dingusppc.git
synced 2024-12-23 21:29:28 +00:00
Fixed compare instructions
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parent
5b2369458e
commit
c71be1bc37
@ -473,7 +473,7 @@ void opc_cmp_i_li(PPCDisasmContext* ctx)
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auto ls = (ctx->instr_code >> 21) & 0x1;
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auto ra = (ctx->instr_code >> 16) & 0x1F;
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auto crfd = (ctx->instr_code >> 23) & 0x07;
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auto imm = ctx->instr_code & 0xFFFF;
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int imm = ctx->instr_code & 0xFFFF;
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if (ctx->simplified) {
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@ -481,7 +481,7 @@ void opc_cmp_i_li(PPCDisasmContext* ctx)
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if ((ctx->instr_code >> 26) & 0x1)
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ctx->instr_str = my_sprintf("%-8scr%d, r%d, 0x%X", "cmpwi", crfd, ra, imm);
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else
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ctx->instr_str = my_sprintf("%-8scr%d, r%d, 0x%04X", "cmplwi", crfd, ra, imm);
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ctx->instr_str = my_sprintf("%-8scr%d, r%d, %s0x%X", "cmplwi", crfd, ra, (imm < 0) ? "-" : "", abs(imm));
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return;
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}
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@ -490,7 +490,7 @@ void opc_cmp_i_li(PPCDisasmContext* ctx)
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if ((ctx->instr_code >> 26) & 0x1)
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ctx->instr_str = my_sprintf("%-8scr%d, %d, r%d, 0x%X", "cmpi", crfd, ls, ra, imm);
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else
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ctx->instr_str = my_sprintf("%-8scr%d, %d, r%d, 0x%04X", "cmpli", crfd, ls, ra, imm);
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ctx->instr_str = my_sprintf("%-8scr%d, %d, r%d, %s0x%X", "cmpli", crfd, ls, ra, (imm < 0) ? "-" : "", abs(imm));
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}
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void opc_bool_im(PPCDisasmContext* ctx)
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@ -1067,8 +1067,14 @@ void opc_group31(PPCDisasmContext* ctx)
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if (ctx->simplified) {
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if (!(rs & 1)) {
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ctx->instr_str = my_sprintf("%-8scr%d, r%d, r%d", "cmpw", (rs >> 2), ra, rb);
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return;
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if ((rs >> 2) == 0) {
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ctx->instr_str = my_sprintf("%-8sr%d, r%d", "cmpw", ra, rb);
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return;
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}
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else {
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ctx->instr_str = my_sprintf("%-8scr%d, r%d, r%d", "cmpw", (rs >> 2), ra, rb);
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return;
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}
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}
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}
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@ -1127,8 +1133,9 @@ void opc_group31(PPCDisasmContext* ctx)
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}
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}
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else
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else {
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ctx->instr_str = my_sprintf("%-8scr%d, %d, r%d, r%d", "cmpl", (rs >> 2), (rs & 1), ra, rb);
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}
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break;
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case 83: /* mfmsr */
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ctx->instr_str = my_sprintf("%-8sr%d", "mfmsr",
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@ -357,9 +357,9 @@
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# compare instructions
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0xFFF00100,0x7C15A000,cmpw,r21,r20
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0xFFF00100,0x7FBFB800,cmp,cr7,1,r31,r23
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0xFFF00100,0x7FA05840,cmpl,cr7,1,r0,r11
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0xFFF00100,0x2FA90000,cmpi,cr7,1,r9,0x0
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0xFFF00100,0x2AA3FFFF,cmpli,cr5,1,r3,0xFFFF
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0xFFF00100,0x7F804840,cmplw,cr7,r0,r9
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0xFFF00100,0x2F800000,cmpwi,cr7,r0,0x0
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0xFFF00100,0x298E0022,cmplwi,cr3,r14,0x22
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0xFFF00100,0xFE17C840,fcmpo,cr4,f23,f25
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0xFFF00100,0xFF0C6800,fcmpu,cr6,f12,f13
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