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Fix divw[.] and divwo[.] emulation.

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Also adds a couple of tests for undocumented
CPU behaviour. Remove superfluous "sidiv".
This commit is contained in:
Maxim Poliakovski 2020-02-10 16:06:56 +01:00
parent a4d815344a
commit d4a2f400b5
4 changed files with 71 additions and 91 deletions
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1
cpu/ppc/ppcemu.h
View File

@ -137,7 +137,6 @@ extern uint64_t timebase_counter; //used for storing time base value
//Additional steps to prevent overflow?
extern int32_t add_result;
extern int32_t sidiv_result;
extern int32_t simult_result;
extern uint32_t uiadd_result;
extern uint32_t uidiv_result;

129
cpu/ppc/ppcopcodes.cpp
View File

@ -41,7 +41,6 @@ uint32_t ppc_result_b = 0;
uint32_t ppc_result_c = 0;
uint32_t ppc_result_d = 0;
int32_t sidiv_result;
uint32_t uidiv_result;
uint64_t uiproduct;
int64_t siproduct;
@ -923,115 +922,65 @@ void ppc_mulli() {
void ppc_divw() {
ppc_grab_regsdab();
//handle division by zero cases
switch (ppc_result_b) {
case 0:
ppc_result_d = 0;
ppc_store_result_regd();
return;
case 0xFFFFFFFF:
if (ppc_result_a == 0x80000000) {
ppc_result_d = 0xFFFFFFFF;
ppc_store_result_regd();
ppc_state.ppc_cr &= 0x1FFFFFFF;
return;
}
default:
sidiv_result = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
ppc_result_d = sidiv_result;
ppc_store_result_regd();
if (!ppc_result_b) { /* handle the "anything / 0" case */
ppc_result_d = (ppc_result_a & 0x80000000) ? -1 : 0; /* UNDOCUMENTED! */
} else if (ppc_result_a == 0x80000000UL && ppc_result_b == 0xFFFFFFFFUL) {
ppc_result_d = 0xFFFFFFFF;
} else { /* normal signed devision */
ppc_result_d = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
}
ppc_store_result_regd();
}
void ppc_divwdot() {
ppc_grab_regsdab();
//handle division by zero cases
switch (ppc_result_b) {
case 0:
ppc_result_d = 0;
ppc_store_result_regd();
if ((ppc_result_a == 0) | (ppc_result_a == 0x7FFFFFFF))
ppc_state.ppc_cr |= 0x20000000;
return;
case 0xFFFFFFFF:
if (ppc_result_a == 0x80000000) {
ppc_result_d = 0xFFFFFFFF;
ppc_store_result_regd();
ppc_state.ppc_cr |= 0x80000000;
return;
}
default:
sidiv_result = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
ppc_result_d = sidiv_result;
ppc_changecrf0(ppc_result_d);
ppc_store_result_regd();
if (!ppc_result_b) { /* handle the "anything / 0" case */
ppc_result_d = (ppc_result_a & 0x80000000) ? -1 : 0; /* UNDOCUMENTED! */
} else if (ppc_result_a == 0x80000000UL && ppc_result_b == 0xFFFFFFFFUL) {
ppc_result_d = 0xFFFFFFFF;
} else { /* normal signed devision */
ppc_result_d = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
}
ppc_changecrf0(ppc_result_d);
ppc_store_result_regd();
}
void ppc_divwo() {
ppc_grab_regsdab();
//handle division by zero cases
switch (ppc_result_b) {
case 0:
ppc_result_d = 0;
ppc_store_result_regd();
if ((ppc_result_a == 0) | (ppc_result_a == 0x7FFFFFFF))
ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
return;
case 0xFFFFFFFF:
if (ppc_result_a == 0x80000000UL) {
ppc_result_d = 0xFFFFFFFF;
ppc_store_result_regd();
ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
return;
}
else if (ppc_result_a == 0x7FFFFFFFUL) {
ppc_result_d = 0x80000001;
ppc_store_result_regd();
return;
}
default:
sidiv_result = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
ppc_result_d = sidiv_result;
ppc_setsoov_divwo(ppc_result_a, ppc_result_d);
ppc_store_result_regd();
if (!ppc_result_b) { /* handle the "anything / 0" case */
ppc_result_d = (ppc_result_a & 0x80000000) ? -1 : 0; /* UNDOCUMENTED! */
ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
} else if (ppc_result_a == 0x80000000UL && ppc_result_b == 0xFFFFFFFFUL) {
ppc_result_d = 0xFFFFFFFF;
ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
} else { /* normal signed devision */
ppc_result_d = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
ppc_state.ppc_spr[SPR::XER] &= 0xBFFFFFFFUL;
}
ppc_store_result_regd();
}
void ppc_divwodot() {
ppc_grab_regsdab();
//handle division by zero cases
switch (ppc_result_b) {
case 0:
ppc_result_d = 0;
ppc_store_result_regd();
if (!ppc_result_b) { /* handle the "anything / 0" case */
ppc_result_d = (ppc_result_a & 0x80000000) ? -1 : 0; /* UNDOCUMENTED! */
ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
ppc_state.ppc_cr |= 0x30000000;
return;
case 0xFFFFFFFF:
if (ppc_result_a == 0x80000000UL) {
ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
ppc_state.ppc_cr |= 0x90000000;
ppc_result_d = 0xFFFFFFFF;
ppc_store_result_regd();
return;
}
else if (ppc_result_a == 0x7FFFFFFFUL) {
ppc_result_d = 0x80000001;
ppc_state.ppc_cr |= 0x80000000;
ppc_store_result_regd();
return;
}
default:
sidiv_result = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
ppc_result_d = (uint32_t)sidiv_result;
ppc_setsoov_divwo(ppc_result_a, ppc_result_d);
ppc_changecrf0(ppc_result_d);
ppc_store_result_regd();
} else if (ppc_result_a == 0x80000000UL && ppc_result_b == 0xFFFFFFFFUL) {
ppc_result_d = 0xFFFFFFFF;
ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
} else { /* normal signed devision */
ppc_result_d = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
ppc_state.ppc_spr[SPR::XER] &= 0xBFFFFFFFUL;
}
ppc_changecrf0(ppc_result_d);
ppc_store_result_regd();
}
void ppc_divwu() {

16
cpu/ppc/test/ppcinttest.txt
View File

@ -286,7 +286,11 @@ cntlzw. :: rD 0x00000001 | rA 0x40000000 | XER: 0x00000000 | CR: 0x40000000
cntlzw. :: rD 0x00000000 | rA 0x80000000 | XER: 0x00000000 | CR: 0x20000000
divw :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0x00000000 | CR: 0x00000000
divw :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0x00000000 | CR: 0x00000000
divw :: rD 0xFFFFFFFF | rA 0x8FFFFFFF | rB 0x00000000 | XER: 0x00000000 | CR: 0x00000000
divw :: rD 0x00000000 | rA 0x00000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
divw :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
divw :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR: 0x00000000
divw :: rD 0xFFFFFFFF | rA 0x7FFFFFFF | rB 0x80000001 | XER: 0x00000000 | CR: 0x00000000
divw :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
divw :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
divw :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
@ -297,7 +301,11 @@ divw :: rD 0x00000000 | rA 0xFFFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR
divw :: rD 0x00000001 | rA 0xFFFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
divw. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0x00000000 | CR: 0x20000000
divw. :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0x00000000 | CR: 0x20000000
divw. :: rD 0xFFFFFFFF | rA 0x8FFFFFFF | rB 0x00000000 | XER: 0x00000000 | CR: 0x80000000
divw. :: rD 0x00000000 | rA 0x00000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x20000000
divw. :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x80000000
divw. :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR: 0x20000000
divw. :: rD 0xFFFFFFFF | rA 0x7FFFFFFF | rB 0x80000001 | XER: 0x00000000 | CR: 0x80000000
divw. :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x80000000
divw. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x20000000
divw. :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x40000000
@ -308,7 +316,11 @@ divw. :: rD 0x00000000 | rA 0xFFFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR
divw. :: rD 0x00000001 | rA 0xFFFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x40000000
divwo :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0xC0000000 | CR: 0x00000000
divwo :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0xC0000000 | CR: 0x00000000
divwo :: rD 0xFFFFFFFF | rA 0x8FFFFFFF | rB 0x00000000 | XER: 0xC0000000 | CR: 0x00000000
divwo :: rD 0x00000000 | rA 0x00000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
divwo :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
divwo :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR: 0x00000000
divwo :: rD 0xFFFFFFFF | rA 0x7FFFFFFF | rB 0x80000001 | XER: 0x00000000 | CR: 0x00000000
divwo :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0xC0000000 | CR: 0x00000000
divwo :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
divwo :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
@ -319,7 +331,11 @@ divwo :: rD 0x00000000 | rA 0xFFFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR
divwo :: rD 0x00000001 | rA 0xFFFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
divwo. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0xC0000000 | CR: 0x30000000
divwo. :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0xC0000000 | CR: 0x30000000
divwo. :: rD 0xFFFFFFFF | rA 0x8FFFFFFF | rB 0x00000000 | XER: 0xC0000000 | CR: 0x90000000
divwo. :: rD 0x00000000 | rA 0x00000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x20000000
divwo. :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x80000000
divwo. :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR: 0x20000000
divwo. :: rD 0xFFFFFFFF | rA 0x7FFFFFFF | rB 0x80000001 | XER: 0x00000000 | CR: 0x80000000
divwo. :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0xC0000000 | CR: 0x90000000
divwo. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x20000000
divwo. :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x40000000

16
cpu/ppc/test/ppcinttests.csv
View File

@ -286,7 +286,11 @@ CNTLZW.,0x7C630035,rD=0x00000001,rA=0x40000000,XER=0x00000000,CR=0x40000000
CNTLZW.,0x7C630035,rD=0x00000000,rA=0x80000000,XER=0x00000000,CR=0x20000000
DIVW,0x7C6323D6,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0x00000000,CR=0x00000000
DIVW,0x7C6323D6,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0x00000000,CR=0x00000000
DIVW,0x7C6323D6,rD=0xFFFFFFFF,rA=0x8FFFFFFF,rB=0x00000000,XER=0x00000000,CR=0x00000000
DIVW,0x7C6323D6,rD=0x00000000,rA=0x00000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
DIVW,0x7C6323D6,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
DIVW,0x7C6323D6,rD=0x00000000,rA=0x7FFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x00000000
DIVW,0x7C6323D6,rD=0xFFFFFFFF,rA=0x7FFFFFFF,rB=0x80000001,XER=0x00000000,CR=0x00000000
DIVW,0x7C6323D6,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
DIVW,0x7C6323D6,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x00000000
DIVW,0x7C6323D6,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x00000000
@ -297,7 +301,11 @@ DIVW,0x7C6323D6,rD=0x00000000,rA=0xFFFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x00
DIVW,0x7C6323D6,rD=0x00000001,rA=0xFFFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0x00000000,CR=0x20000000
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0x00000000,CR=0x20000000
DIVW.,0x7C6323D7,rD=0xFFFFFFFF,rA=0x8FFFFFFF,rB=0x00000000,XER=0x00000000,CR=0x80000000
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x00000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x20000000
DIVW.,0x7C6323D7,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x80000000
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x7FFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x20000000
DIVW.,0x7C6323D7,rD=0xFFFFFFFF,rA=0x7FFFFFFF,rB=0x80000001,XER=0x00000000,CR=0x80000000
DIVW.,0x7C6323D7,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x80000000
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x20000000
DIVW.,0x7C6323D7,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x40000000
@ -308,7 +316,11 @@ DIVW.,0x7C6323D7,rD=0x00000000,rA=0xFFFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x2
DIVW.,0x7C6323D7,rD=0x00000001,rA=0xFFFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x40000000
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0xC0000000,CR=0x00000000
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0xC0000000,CR=0x00000000
DIVWO,0x7C6327D6,rD=0xFFFFFFFF,rA=0x8FFFFFFF,rB=0x00000000,XER=0xC0000000,CR=0x00000000
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x00000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
DIVWO,0x7C6327D6,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x7FFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x00000000
DIVWO,0x7C6327D6,rD=0xFFFFFFFF,rA=0x7FFFFFFF,rB=0x80000001,XER=0x00000000,CR=0x00000000
DIVWO,0x7C6327D6,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0xC0000000,CR=0x00000000
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x00000000
DIVWO,0x7C6327D6,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x00000000
@ -319,7 +331,11 @@ DIVWO,0x7C6327D6,rD=0x00000000,rA=0xFFFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x0
DIVWO,0x7C6327D6,rD=0x00000001,rA=0xFFFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0xC0000000,CR=0x30000000
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0xC0000000,CR=0x30000000
DIVWO.,0x7C6327D7,rD=0xFFFFFFFF,rA=0x8FFFFFFF,rB=0x00000000,XER=0xC0000000,CR=0x90000000
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x00000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x20000000
DIVWO.,0x7C6327D7,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x80000000
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x7FFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x20000000
DIVWO.,0x7C6327D7,rD=0xFFFFFFFF,rA=0x7FFFFFFF,rB=0x80000001,XER=0x00000000,CR=0x80000000
DIVWO.,0x7C6327D7,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0xC0000000,CR=0x90000000
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x20000000
DIVWO.,0x7C6327D7,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x40000000

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