mirror of
https://github.com/dingusdev/dingusppc.git
synced 2024-12-23 06:29:38 +00:00
Fix divw[.] and divwo[.] emulation.
Also adds a couple of tests for undocumented CPU behaviour. Remove superfluous "sidiv".
This commit is contained in:
parent
a4d815344a
commit
d4a2f400b5
@ -137,7 +137,6 @@ extern uint64_t timebase_counter; //used for storing time base value
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//Additional steps to prevent overflow?
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//Additional steps to prevent overflow?
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extern int32_t add_result;
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extern int32_t add_result;
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extern int32_t sidiv_result;
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extern int32_t simult_result;
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extern int32_t simult_result;
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extern uint32_t uiadd_result;
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extern uint32_t uiadd_result;
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extern uint32_t uidiv_result;
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extern uint32_t uidiv_result;
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@ -41,7 +41,6 @@ uint32_t ppc_result_b = 0;
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uint32_t ppc_result_c = 0;
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uint32_t ppc_result_c = 0;
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uint32_t ppc_result_d = 0;
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uint32_t ppc_result_d = 0;
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int32_t sidiv_result;
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uint32_t uidiv_result;
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uint32_t uidiv_result;
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uint64_t uiproduct;
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uint64_t uiproduct;
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int64_t siproduct;
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int64_t siproduct;
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@ -923,116 +922,66 @@ void ppc_mulli() {
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void ppc_divw() {
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void ppc_divw() {
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ppc_grab_regsdab();
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ppc_grab_regsdab();
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//handle division by zero cases
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if (!ppc_result_b) { /* handle the "anything / 0" case */
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switch (ppc_result_b) {
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ppc_result_d = (ppc_result_a & 0x80000000) ? -1 : 0; /* UNDOCUMENTED! */
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case 0:
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} else if (ppc_result_a == 0x80000000UL && ppc_result_b == 0xFFFFFFFFUL) {
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ppc_result_d = 0;
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ppc_store_result_regd();
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return;
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case 0xFFFFFFFF:
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if (ppc_result_a == 0x80000000) {
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ppc_result_d = 0xFFFFFFFF;
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ppc_result_d = 0xFFFFFFFF;
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ppc_store_result_regd();
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} else { /* normal signed devision */
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ppc_state.ppc_cr &= 0x1FFFFFFF;
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ppc_result_d = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
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return;
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}
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}
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default:
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sidiv_result = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
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ppc_result_d = sidiv_result;
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ppc_store_result_regd();
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ppc_store_result_regd();
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}
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}
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}
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void ppc_divwdot() {
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void ppc_divwdot() {
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ppc_grab_regsdab();
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ppc_grab_regsdab();
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//handle division by zero cases
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if (!ppc_result_b) { /* handle the "anything / 0" case */
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switch (ppc_result_b) {
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ppc_result_d = (ppc_result_a & 0x80000000) ? -1 : 0; /* UNDOCUMENTED! */
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case 0:
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} else if (ppc_result_a == 0x80000000UL && ppc_result_b == 0xFFFFFFFFUL) {
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ppc_result_d = 0;
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ppc_store_result_regd();
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if ((ppc_result_a == 0) | (ppc_result_a == 0x7FFFFFFF))
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ppc_state.ppc_cr |= 0x20000000;
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return;
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case 0xFFFFFFFF:
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if (ppc_result_a == 0x80000000) {
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ppc_result_d = 0xFFFFFFFF;
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ppc_result_d = 0xFFFFFFFF;
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ppc_store_result_regd();
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} else { /* normal signed devision */
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ppc_state.ppc_cr |= 0x80000000;
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ppc_result_d = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
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return;
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}
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}
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default:
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sidiv_result = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
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ppc_result_d = sidiv_result;
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ppc_changecrf0(ppc_result_d);
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ppc_changecrf0(ppc_result_d);
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ppc_store_result_regd();
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ppc_store_result_regd();
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}
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}
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}
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void ppc_divwo() {
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void ppc_divwo() {
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ppc_grab_regsdab();
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ppc_grab_regsdab();
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//handle division by zero cases
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if (!ppc_result_b) { /* handle the "anything / 0" case */
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switch (ppc_result_b) {
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ppc_result_d = (ppc_result_a & 0x80000000) ? -1 : 0; /* UNDOCUMENTED! */
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case 0:
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ppc_result_d = 0;
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ppc_store_result_regd();
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if ((ppc_result_a == 0) | (ppc_result_a == 0x7FFFFFFF))
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ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
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ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
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return;
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} else if (ppc_result_a == 0x80000000UL && ppc_result_b == 0xFFFFFFFFUL) {
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case 0xFFFFFFFF:
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if (ppc_result_a == 0x80000000UL) {
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ppc_result_d = 0xFFFFFFFF;
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ppc_result_d = 0xFFFFFFFF;
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ppc_store_result_regd();
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ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
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ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
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return;
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} else { /* normal signed devision */
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ppc_result_d = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
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ppc_state.ppc_spr[SPR::XER] &= 0xBFFFFFFFUL;
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}
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}
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else if (ppc_result_a == 0x7FFFFFFFUL) {
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ppc_result_d = 0x80000001;
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ppc_store_result_regd();
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ppc_store_result_regd();
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return;
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}
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default:
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sidiv_result = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
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ppc_result_d = sidiv_result;
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ppc_setsoov_divwo(ppc_result_a, ppc_result_d);
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ppc_store_result_regd();
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}
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}
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}
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void ppc_divwodot() {
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void ppc_divwodot() {
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ppc_grab_regsdab();
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ppc_grab_regsdab();
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//handle division by zero cases
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if (!ppc_result_b) { /* handle the "anything / 0" case */
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switch (ppc_result_b) {
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ppc_result_d = (ppc_result_a & 0x80000000) ? -1 : 0; /* UNDOCUMENTED! */
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case 0:
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ppc_result_d = 0;
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ppc_store_result_regd();
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ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
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ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
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ppc_state.ppc_cr |= 0x30000000;
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} else if (ppc_result_a == 0x80000000UL && ppc_result_b == 0xFFFFFFFFUL) {
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return;
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case 0xFFFFFFFF:
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if (ppc_result_a == 0x80000000UL) {
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ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
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ppc_state.ppc_cr |= 0x90000000;
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ppc_result_d = 0xFFFFFFFF;
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ppc_result_d = 0xFFFFFFFF;
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ppc_store_result_regd();
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ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
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return;
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} else { /* normal signed devision */
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ppc_result_d = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
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ppc_state.ppc_spr[SPR::XER] &= 0xBFFFFFFFUL;
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}
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}
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else if (ppc_result_a == 0x7FFFFFFFUL) {
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ppc_result_d = 0x80000001;
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ppc_state.ppc_cr |= 0x80000000;
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ppc_store_result_regd();
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return;
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}
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default:
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sidiv_result = (int32_t)ppc_result_a / (int32_t)ppc_result_b;
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ppc_result_d = (uint32_t)sidiv_result;
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ppc_setsoov_divwo(ppc_result_a, ppc_result_d);
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ppc_changecrf0(ppc_result_d);
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ppc_changecrf0(ppc_result_d);
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ppc_store_result_regd();
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ppc_store_result_regd();
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}
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}
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}
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void ppc_divwu() {
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void ppc_divwu() {
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ppc_grab_regsdab();
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ppc_grab_regsdab();
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@ -286,7 +286,11 @@ cntlzw. :: rD 0x00000001 | rA 0x40000000 | XER: 0x00000000 | CR: 0x40000000
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cntlzw. :: rD 0x00000000 | rA 0x80000000 | XER: 0x00000000 | CR: 0x20000000
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cntlzw. :: rD 0x00000000 | rA 0x80000000 | XER: 0x00000000 | CR: 0x20000000
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divw :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0xFFFFFFFF | rA 0x8FFFFFFF | rB 0x00000000 | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x00000000 | rA 0x00000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0xFFFFFFFF | rA 0x7FFFFFFF | rB 0x80000001 | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
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@ -297,7 +301,11 @@ divw :: rD 0x00000000 | rA 0xFFFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR
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divw :: rD 0x00000001 | rA 0xFFFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divw :: rD 0x00000001 | rA 0xFFFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divw. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0x00000000 | CR: 0x20000000
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divw. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0x00000000 | CR: 0x20000000
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divw. :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0x00000000 | CR: 0x20000000
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divw. :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0x00000000 | CR: 0x20000000
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divw. :: rD 0xFFFFFFFF | rA 0x8FFFFFFF | rB 0x00000000 | XER: 0x00000000 | CR: 0x80000000
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divw. :: rD 0x00000000 | rA 0x00000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x20000000
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divw. :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x80000000
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divw. :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x80000000
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divw. :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR: 0x20000000
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divw. :: rD 0xFFFFFFFF | rA 0x7FFFFFFF | rB 0x80000001 | XER: 0x00000000 | CR: 0x80000000
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divw. :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x80000000
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divw. :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x80000000
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divw. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x20000000
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divw. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x20000000
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divw. :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x40000000
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divw. :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x40000000
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@ -308,7 +316,11 @@ divw. :: rD 0x00000000 | rA 0xFFFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR
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divw. :: rD 0x00000001 | rA 0xFFFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x40000000
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divw. :: rD 0x00000001 | rA 0xFFFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x40000000
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divwo :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0xC0000000 | CR: 0x00000000
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divwo :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0xC0000000 | CR: 0x00000000
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divwo :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0xC0000000 | CR: 0x00000000
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divwo :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0xC0000000 | CR: 0x00000000
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divwo :: rD 0xFFFFFFFF | rA 0x8FFFFFFF | rB 0x00000000 | XER: 0xC0000000 | CR: 0x00000000
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divwo :: rD 0x00000000 | rA 0x00000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divwo :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divwo :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divwo :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR: 0x00000000
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divwo :: rD 0xFFFFFFFF | rA 0x7FFFFFFF | rB 0x80000001 | XER: 0x00000000 | CR: 0x00000000
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divwo :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0xC0000000 | CR: 0x00000000
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divwo :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0xC0000000 | CR: 0x00000000
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divwo :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
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divwo :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
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divwo :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
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divwo :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
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@ -319,7 +331,11 @@ divwo :: rD 0x00000000 | rA 0xFFFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR
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divwo :: rD 0x00000001 | rA 0xFFFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divwo :: rD 0x00000001 | rA 0xFFFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
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divwo. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0xC0000000 | CR: 0x30000000
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divwo. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0xC0000000 | CR: 0x30000000
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divwo. :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0xC0000000 | CR: 0x30000000
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divwo. :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x00000000 | XER: 0xC0000000 | CR: 0x30000000
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divwo. :: rD 0xFFFFFFFF | rA 0x8FFFFFFF | rB 0x00000000 | XER: 0xC0000000 | CR: 0x90000000
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divwo. :: rD 0x00000000 | rA 0x00000000 | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x20000000
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divwo. :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x80000000
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divwo. :: rD 0x80000001 | rA 0x7FFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x80000000
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divwo. :: rD 0x00000000 | rA 0x7FFFFFFF | rB 0x80000000 | XER: 0x00000000 | CR: 0x20000000
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divwo. :: rD 0xFFFFFFFF | rA 0x7FFFFFFF | rB 0x80000001 | XER: 0x00000000 | CR: 0x80000000
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divwo. :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0xC0000000 | CR: 0x90000000
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divwo. :: rD 0xFFFFFFFF | rA 0x80000000 | rB 0xFFFFFFFF | XER: 0xC0000000 | CR: 0x90000000
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divwo. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x20000000
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divwo. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x20000000
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divwo. :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x40000000
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divwo. :: rD 0x00000001 | rA 0x00000001 | rB 0x00000001 | XER: 0x00000000 | CR: 0x40000000
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@ -286,7 +286,11 @@ CNTLZW.,0x7C630035,rD=0x00000001,rA=0x40000000,XER=0x00000000,CR=0x40000000
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CNTLZW.,0x7C630035,rD=0x00000000,rA=0x80000000,XER=0x00000000,CR=0x20000000
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CNTLZW.,0x7C630035,rD=0x00000000,rA=0x80000000,XER=0x00000000,CR=0x20000000
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DIVW,0x7C6323D6,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0x00000000,CR=0x00000000
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DIVW,0x7C6323D6,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0x00000000,CR=0x00000000
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DIVW,0x7C6323D6,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0x00000000,CR=0x00000000
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DIVW,0x7C6323D6,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0x00000000,CR=0x00000000
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DIVW,0x7C6323D6,rD=0xFFFFFFFF,rA=0x8FFFFFFF,rB=0x00000000,XER=0x00000000,CR=0x00000000
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DIVW,0x7C6323D6,rD=0x00000000,rA=0x00000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
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DIVW,0x7C6323D6,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
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DIVW,0x7C6323D6,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
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DIVW,0x7C6323D6,rD=0x00000000,rA=0x7FFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x00000000
|
||||||
|
DIVW,0x7C6323D6,rD=0xFFFFFFFF,rA=0x7FFFFFFF,rB=0x80000001,XER=0x00000000,CR=0x00000000
|
||||||
DIVW,0x7C6323D6,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
|
DIVW,0x7C6323D6,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
|
||||||
DIVW,0x7C6323D6,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x00000000
|
DIVW,0x7C6323D6,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x00000000
|
||||||
DIVW,0x7C6323D6,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x00000000
|
DIVW,0x7C6323D6,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x00000000
|
||||||
@ -297,7 +301,11 @@ DIVW,0x7C6323D6,rD=0x00000000,rA=0xFFFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x00
|
|||||||
DIVW,0x7C6323D6,rD=0x00000001,rA=0xFFFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
|
DIVW,0x7C6323D6,rD=0x00000001,rA=0xFFFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
|
||||||
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0x00000000,CR=0x20000000
|
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0x00000000,CR=0x20000000
|
||||||
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0x00000000,CR=0x20000000
|
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0x00000000,CR=0x20000000
|
||||||
|
DIVW.,0x7C6323D7,rD=0xFFFFFFFF,rA=0x8FFFFFFF,rB=0x00000000,XER=0x00000000,CR=0x80000000
|
||||||
|
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x00000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x20000000
|
||||||
DIVW.,0x7C6323D7,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x80000000
|
DIVW.,0x7C6323D7,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x80000000
|
||||||
|
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x7FFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x20000000
|
||||||
|
DIVW.,0x7C6323D7,rD=0xFFFFFFFF,rA=0x7FFFFFFF,rB=0x80000001,XER=0x00000000,CR=0x80000000
|
||||||
DIVW.,0x7C6323D7,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x80000000
|
DIVW.,0x7C6323D7,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x80000000
|
||||||
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x20000000
|
DIVW.,0x7C6323D7,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x20000000
|
||||||
DIVW.,0x7C6323D7,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x40000000
|
DIVW.,0x7C6323D7,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x40000000
|
||||||
@ -308,7 +316,11 @@ DIVW.,0x7C6323D7,rD=0x00000000,rA=0xFFFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x2
|
|||||||
DIVW.,0x7C6323D7,rD=0x00000001,rA=0xFFFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x40000000
|
DIVW.,0x7C6323D7,rD=0x00000001,rA=0xFFFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x40000000
|
||||||
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0xC0000000,CR=0x00000000
|
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0xC0000000,CR=0x00000000
|
||||||
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0xC0000000,CR=0x00000000
|
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0xC0000000,CR=0x00000000
|
||||||
|
DIVWO,0x7C6327D6,rD=0xFFFFFFFF,rA=0x8FFFFFFF,rB=0x00000000,XER=0xC0000000,CR=0x00000000
|
||||||
|
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x00000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
|
||||||
DIVWO,0x7C6327D6,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
|
DIVWO,0x7C6327D6,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
|
||||||
|
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x7FFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x00000000
|
||||||
|
DIVWO,0x7C6327D6,rD=0xFFFFFFFF,rA=0x7FFFFFFF,rB=0x80000001,XER=0x00000000,CR=0x00000000
|
||||||
DIVWO,0x7C6327D6,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0xC0000000,CR=0x00000000
|
DIVWO,0x7C6327D6,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0xC0000000,CR=0x00000000
|
||||||
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x00000000
|
DIVWO,0x7C6327D6,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x00000000
|
||||||
DIVWO,0x7C6327D6,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x00000000
|
DIVWO,0x7C6327D6,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x00000000
|
||||||
@ -319,7 +331,11 @@ DIVWO,0x7C6327D6,rD=0x00000000,rA=0xFFFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x0
|
|||||||
DIVWO,0x7C6327D6,rD=0x00000001,rA=0xFFFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
|
DIVWO,0x7C6327D6,rD=0x00000001,rA=0xFFFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
|
||||||
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0xC0000000,CR=0x30000000
|
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0xC0000000,CR=0x30000000
|
||||||
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0xC0000000,CR=0x30000000
|
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x7FFFFFFF,rB=0x00000000,XER=0xC0000000,CR=0x30000000
|
||||||
|
DIVWO.,0x7C6327D7,rD=0xFFFFFFFF,rA=0x8FFFFFFF,rB=0x00000000,XER=0xC0000000,CR=0x90000000
|
||||||
|
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x00000000,rB=0xFFFFFFFF,XER=0x00000000,CR=0x20000000
|
||||||
DIVWO.,0x7C6327D7,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x80000000
|
DIVWO.,0x7C6327D7,rD=0x80000001,rA=0x7FFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x80000000
|
||||||
|
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x7FFFFFFF,rB=0x80000000,XER=0x00000000,CR=0x20000000
|
||||||
|
DIVWO.,0x7C6327D7,rD=0xFFFFFFFF,rA=0x7FFFFFFF,rB=0x80000001,XER=0x00000000,CR=0x80000000
|
||||||
DIVWO.,0x7C6327D7,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0xC0000000,CR=0x90000000
|
DIVWO.,0x7C6327D7,rD=0xFFFFFFFF,rA=0x80000000,rB=0xFFFFFFFF,XER=0xC0000000,CR=0x90000000
|
||||||
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x20000000
|
DIVWO.,0x7C6327D7,rD=0x00000000,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x20000000
|
||||||
DIVWO.,0x7C6327D7,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x40000000
|
DIVWO.,0x7C6327D7,rD=0x00000001,rA=0x00000001,rB=0x00000001,XER=0x00000000,CR=0x40000000
|
||||||
|
Can't render this file because it has a wrong number of fields in line 85.
|
Loading…
Reference in New Issue
Block a user