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Fix ESCC register addressing.

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This commit is contained in:
Maxim Poliakovski 2022-05-03 00:16:09 +02:00
parent be4f835e6c
commit d4c08bbe31
5 changed files with 27 additions and 12 deletions
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4
devices/ioctrl/amic.cpp
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@ -105,7 +105,7 @@ uint32_t AMIC::read(uint32_t reg_start, uint32_t offset, int size)
case 1:
return this->viacuda->read(offset >> 9);
case 4: // SCC registers
return this->escc->read((offset >> 1) & 0xF);
return this->escc->read(compat_to_macrisc[(offset >> 1) & 0xF]);
case 0xA: // MACE registers
return this->mace->read((offset >> 4) & 0x1F);
case 0x10: // SCSI registers
@ -185,7 +185,7 @@ void AMIC::write(uint32_t reg_start, uint32_t offset, uint32_t value, int size)
this->viacuda->write(offset >> 9, value);
return;
case 4:
this->escc->write((offset >> 1) & 0xF, value);
this->escc->write(compat_to_macrisc[(offset >> 1) & 0xF], value);
return;
case 0xA: // MACE registers
this->mace->write((offset >> 4) & 0x1F, value);

4
devices/ioctrl/grandcentral.cpp
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@ -95,7 +95,7 @@ uint32_t GrandCentral::read(uint32_t reg_start, uint32_t offset, int size)
return this->mace->read((offset >> 4) & 0x1F);
case 2: // ESCC compatible addressing
if ((offset & 0xFF) < 16) {
return this->escc->read((offset >> 1) & 0xF);
return this->escc->read(compat_to_macrisc[(offset >> 1) & 0xF]);
}
// fallthrough
case 3: // ESCC MacRISC addressing
@ -152,7 +152,7 @@ void GrandCentral::write(uint32_t reg_start, uint32_t offset, uint32_t value, in
break;
case 2: // ESCC compatible addressing
if ((offset & 0xFF) < 16) {
this->escc->write((offset >> 1) & 0xF, value);
this->escc->write(compat_to_macrisc[(offset >> 1) & 0xF], value);
break;
}
// fallthrough

4
devices/ioctrl/heathrow.cpp
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@ -138,7 +138,7 @@ uint32_t HeathrowIC::read(uint32_t reg_start, uint32_t offset, int size) {
break;
case 0x12: // ESCC compatible addressing
if ((offset & 0xFF) < 16) {
return this->escc->read((offset >> 1) & 0xF);
return this->escc->read(compat_to_macrisc[(offset >> 1) & 0xF]);
}
// fallthrough
case 0x13: // ESCC MacRISC addressing
@ -180,7 +180,7 @@ void HeathrowIC::write(uint32_t reg_start, uint32_t offset, uint32_t value, int
break;
case 0x12: // ESCC compatible addressing
if ((offset & 0xFF) < 16) {
this->escc->write((offset >> 1) & 0xF, value);
this->escc->write(compat_to_macrisc[(offset >> 1) & 0xF], value);
break;
}
// fallthrough

7
devices/serial/escc.cpp
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@ -27,6 +27,13 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
#include <cinttypes>
#include <memory>
/** Remap the compatible addressing scheme to MacRISC one. */
const uint8_t compat_to_macrisc[6] = {
EsccReg::Port_B_Cmd, EsccReg::Port_A_Cmd,
EsccReg::Port_B_Data, EsccReg::Port_A_Data,
EsccReg::Enh_Reg_B, EsccReg::Enh_Reg_A
};
EsccController::EsccController()
{
this->ch_a = std::unique_ptr<EsccChannel> (new EsccChannel("A"));

20
devices/serial/escc.h
View File

@ -1,6 +1,6 @@
/*
DingusPPC - The Experimental PowerPC Macintosh emulator
Copyright (C) 2018-21 divingkatae and maximum
Copyright (C) 2018-22 divingkatae and maximum
(theweirdo) spatium
(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
@ -30,18 +30,26 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
/** ESCC register positions */
/* Please note that the registers below are provided
by Apple I/O controllers for accessing ESCC in a
more convenient way. Actual physical addresses
are controller dependent. */
by the Apple I/O controllers for accessing ESCC
in a more convenient way. Actual physical addresses
are controller dependent.
The registers are ordered according with the MacRISC
scheme used in the PCI Power Macintosh models.
Pre-PCI Macs uses the so-called compatibility
addressing. Please use compat_to_macrisc table
below for converting from compat to MacRISC.
*/
enum EsccReg : uint8_t {
Port_B_Cmd = 0,
Port_A_Cmd = 1,
Port_B_Data = 2, // direct access to WR8/RR8
Port_B_Data = 1, // direct access to WR8/RR8
Port_A_Cmd = 2,
Port_A_Data = 3, // direct access to WR8/RR8
Enh_Reg_B = 4, // undocumented Apple extension
Enh_Reg_A = 5, // undocumented Apple extension
};
extern const uint8_t compat_to_macrisc[6];
/** LocalTalk LTPC registers provided by a MacIO controller. */
enum LocalTalkReg : uint8_t {
Rec_Count = 8,