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ppc_mmu: rename reg_desc to rgn_desc to improve readability.
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52a64168d7
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@ -526,9 +526,9 @@ static TLBEntry* itlb2_refill(uint32_t guest_va)
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}
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// look up host virtual address
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AddressMapEntry* reg_desc = mem_ctrl_instance->find_range(phys_addr);
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if (reg_desc) {
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if (reg_desc->type & RT_MMIO) {
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AddressMapEntry* rgn_desc = mem_ctrl_instance->find_range(phys_addr);
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if (rgn_desc) {
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if (rgn_desc->type & RT_MMIO) {
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ABORT_F("Instruction fetch from MMIO region at 0x%08X!\n", phys_addr);
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}
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// refill the secondary TLB
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@ -536,8 +536,8 @@ static TLBEntry* itlb2_refill(uint32_t guest_va)
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tlb_entry = tlb2_target_entry<TLBType::ITLB>(tag);
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tlb_entry->tag = tag;
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tlb_entry->flags = flags | TLBFlags::PAGE_MEM;
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tlb_entry->host_va_offs_r = (int64_t)reg_desc->mem_ptr - guest_va +
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(phys_addr - reg_desc->start);
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tlb_entry->host_va_offs_r = (int64_t)rgn_desc->mem_ptr - guest_va +
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(phys_addr - rgn_desc->start);
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} else {
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ABORT_F("Instruction fetch from unmapped memory at 0x%08X!\n", phys_addr);
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}
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@ -599,20 +599,20 @@ static TLBEntry* dtlb2_refill(uint32_t guest_va, int is_write)
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}
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// look up host virtual address
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AddressMapEntry* reg_desc = mem_ctrl_instance->find_range(phys_addr);
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if (reg_desc) {
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AddressMapEntry* rgn_desc = mem_ctrl_instance->find_range(phys_addr);
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if (rgn_desc) {
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// refill the secondary TLB
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tlb_entry = tlb2_target_entry<TLBType::DTLB>(tag);
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tlb_entry->tag = tag;
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if (reg_desc->type & RT_MMIO) { // MMIO region
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if (rgn_desc->type & RT_MMIO) { // MMIO region
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tlb_entry->flags = flags | TLBFlags::PAGE_IO;
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tlb_entry->reg_desc = reg_desc;
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tlb_entry->dev_base_va = guest_va - (phys_addr - reg_desc->start);
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tlb_entry->rgn_desc = rgn_desc;
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tlb_entry->dev_base_va = guest_va - (phys_addr - rgn_desc->start);
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} else { // memory region backed by host memory
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tlb_entry->flags = flags | TLBFlags::PAGE_MEM;
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tlb_entry->host_va_offs_r = (int64_t)reg_desc->mem_ptr - guest_va +
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(phys_addr - reg_desc->start);
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if (reg_desc->type == RT_ROM) {
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tlb_entry->host_va_offs_r = (int64_t)rgn_desc->mem_ptr - guest_va +
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(phys_addr - rgn_desc->start);
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if (rgn_desc->type == RT_ROM) {
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// redirect writes to the dummy page for ROM regions
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tlb_entry->host_va_offs_w = (int64_t)&dummy_page - guest_va;
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} else {
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@ -1036,7 +1036,7 @@ inline T mmu_read_vmem(uint32_t guest_va)
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iomem_reads_total++;
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#endif
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return (
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tlb2_entry->reg_desc->devobj->read(tlb2_entry->reg_desc->start,
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tlb2_entry->rgn_desc->devobj->read(tlb2_entry->rgn_desc->start,
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guest_va - tlb2_entry->dev_base_va,
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sizeof(T))
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);
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@ -1144,7 +1144,7 @@ inline void mmu_write_vmem(uint32_t guest_va, T value)
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#ifdef MMU_PROFILING
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iomem_writes_total++;
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#endif
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tlb2_entry->reg_desc->devobj->write(tlb2_entry->reg_desc->start,
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tlb2_entry->rgn_desc->devobj->write(tlb2_entry->rgn_desc->start,
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guest_va - tlb2_entry->dev_base_va,
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value, sizeof(T));
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return;
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@ -1631,7 +1631,7 @@ static inline uint64_t tlb_translate_addr(uint32_t guest_va)
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tlb1_entry->host_va_offs_r = tlb2_entry->host_va_offs_r;
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return tlb1_entry->host_va_offs_r + guest_va;
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} else { // an attempt to access a memory-mapped device
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return guest_va - tlb2_entry->reg_desc->start;
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return guest_va - tlb2_entry->rgn_desc->start;
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}
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}
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}
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@ -87,7 +87,7 @@ typedef struct TLBEntry {
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int64_t host_va_offs_w;
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};
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struct { // for MMIO pages
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AddressMapEntry* reg_desc;
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AddressMapEntry* rgn_desc;
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int64_t dev_base_va;
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};
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};
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