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https://github.com/dingusdev/dingusppc.git
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Fix compilation warnings from previous commits.
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parent
6a083869e1
commit
e1793b6305
@ -28,8 +28,8 @@ enum endian_switch {big_end = 0, little_end = 1};
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typedef void (*PPCOpcode)(void);
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typedef void (*PPCOpcode)(void);
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typedef union FPR_storage {
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union FPR_storage {
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double dbl64_r = 0.0; // double floating-point representation
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double dbl64_r; // double floating-point representation
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uint64_t int64_r; // double integer representation
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uint64_t int64_r; // double integer representation
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};
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};
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@ -242,8 +242,6 @@ bool ppc_confirm_inf_nan(uint64_t input_a, uint64_t input_b, bool is_single, uin
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return true;
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return true;
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}
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}
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break;
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break;
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default:
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return false;
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}
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}
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}
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}
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else {
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else {
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@ -282,10 +280,9 @@ bool ppc_confirm_inf_nan(uint64_t input_a, uint64_t input_b, bool is_single, uin
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return true;
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return true;
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}
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}
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break;
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break;
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default:
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return false;
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}
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}
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}
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}
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return false;
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}
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}
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void ppc_fpresult_update(uint64_t set_result, bool confirm_arc) {
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void ppc_fpresult_update(uint64_t set_result, bool confirm_arc) {
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3
main.cpp
3
main.cpp
@ -100,7 +100,6 @@ uint8_t write_char;
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//Initialize the PPC's registers.
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//Initialize the PPC's registers.
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void reg_init(){
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void reg_init(){
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for (uint32_t i = 0; i < 32; i++){
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for (uint32_t i = 0; i < 32; i++){
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ppc_state.ppc_fpr[i].dbl64_r = 0.0;
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ppc_state.ppc_fpr[i].int64_r = 0;
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ppc_state.ppc_fpr[i].int64_r = 0;
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}
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}
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ppc_state.ppc_pc = 0;
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ppc_state.ppc_pc = 0;
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@ -174,7 +173,7 @@ void reg_init(){
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//Debugging Functions
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//Debugging Functions
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uint32_t reg_print(){
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uint32_t reg_print(){
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for (uint32_t i = 0; i < 32; i++){
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for (uint32_t i = 0; i < 32; i++){
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printf("FPR %d : %" PRIx64 "", i, ppc_state.ppc_fpr[i]);
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printf("FPR %d : %" PRIx64 "", i, ppc_state.ppc_fpr[i].int64_r);
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}
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}
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ppc_state.ppc_pc = 0;
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ppc_state.ppc_pc = 0;
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for (uint32_t i = 0; i < 32; i++){
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for (uint32_t i = 0; i < 32; i++){
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