diff --git a/cpu/ppc/ppcdisasm.cpp b/cpu/ppc/ppcdisasm.cpp
index 6705ced..394729e 100644
--- a/cpu/ppc/ppcdisasm.cpp
+++ b/cpu/ppc/ppcdisasm.cpp
@@ -219,19 +219,14 @@ void opc_twi(PPCDisasmContext* ctx)
     if (ctx->simplified) {
         strcpy(opcode, trap_cond[to]);
 
-        if (strlen(opcode) == 0) {
-            opc_illegal(ctx);
-            return;
-        }
-        else {
+        if (strlen(opcode) > 0) {
             strcat(opcode, "i");
             ctx->instr_str = my_sprintf("%-8sr%d, 0x%08X", opcode, ra, imm);
+            return;
         }
 
     }
-    else {
-        ctx->instr_str = my_sprintf("%-8s%d, r%d, 0x%08X", "twi", to, ra, imm);
-    }
+    ctx->instr_str = my_sprintf("%-8s%d, r%d, 0x%08X", "twi", to, ra, imm);
 }
 
 void opc_group4(PPCDisasmContext* ctx)
@@ -1025,6 +1020,7 @@ void opc_group31(PPCDisasmContext* ctx)
 
                 if (strlen(opcode) != 0) {
                     ctx->instr_str = my_sprintf("%-8sr%d, r%d", opcode, ra, rb);
+                    return;
                 }
 
             }
diff --git a/cpu/ppc/test/ppcdisasmtest.csv b/cpu/ppc/test/ppcdisasmtest.csv
index b385efa..34edf28 100644
--- a/cpu/ppc/test/ppcdisasmtest.csv
+++ b/cpu/ppc/test/ppcdisasmtest.csv
@@ -192,6 +192,9 @@
 0xFFF00100,0x7D080120,mtcrf,0x80,r8
 0xFFF00100,0x7E007120,mtcrf,0x07,r16
 
+# rotation instructions
+0xFFF00100,0x5400EFFE,rlwinm,r0,r0,0x1D,0x1F,0x1F
+
 # shift instructions, primary opcode 0x1F
 0xFFF00100,0x7C65FE70,srawi,r5,r3,0x1F
 0xFFF00100,0x7D6B1E70,srawi,r11,r11,0x3
@@ -224,6 +227,7 @@
 
 # trap instructions
 0xFFF00100,0x7F800008,tw,28,r0,r0
+0xFFF00100,0C000000,twi,0,r0,0
 
 # integer load and stores
 0xFFF00100,0x80BF0808,lwz,r5,0x808(r31)
@@ -263,6 +267,10 @@
 0xFFF00100,0xBC410008,stmw,r2,0x8(r1)
 0xFFF00100,0xBFC1FFF8,stmw,r30,-0x8(r1)
 
+# misc instructions
+0xFFF00100,0x7D453D2A,stswx,r10,r5,r7
+0xFFF00100,0x7D604828,lwarx,r11,0,r9
+
 # various simplified (extended) mnemonics
 0xFFF00100,0x60000000,nop
 0xFFF00100,0x7C7C1B78,mr,r28,r3