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viacuda.h: cosmetic improvements.
This commit is contained in:
Maxim Poliakovski
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899000b647
commit
f096eef66d
@ -1,6 +1,6 @@
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/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-23 divingkatae and maximum
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Copyright (C) 2018-24 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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@ -57,22 +57,22 @@ class InterruptCtrl;
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/** VIA register offsets. */
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enum {
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VIA_B = 0x00, /* input/output register B */
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VIA_A = 0x01, /* input/output register A */
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VIA_DIRB = 0x02, /* direction B */
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VIA_DIRA = 0x03, /* direction A */
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VIA_T1CL = 0x04, /* low-order timer 1 counter */
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VIA_T1CH = 0x05, /* high-order timer 1 counter */
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VIA_T1LL = 0x06, /* low-order timer 1 latches */
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VIA_T1LH = 0x07, /* high-order timer 1 latches */
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VIA_T2CL = 0x08, /* low-order timer 2 latches */
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VIA_T2CH = 0x09, /* high-order timer 2 counter */
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VIA_SR = 0x0A, /* shift register */
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VIA_ACR = 0x0B, /* auxiliary control register */
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VIA_PCR = 0x0C, /* periheral control register */
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VIA_IFR = 0x0D, /* interrupt flag register */
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VIA_IER = 0x0E, /* interrupt enable register */
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VIA_ANH = 0x0F, /* input/output register A, no handshake */
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VIA_B = 0x00, // input/output register B
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VIA_A = 0x01, // input/output register A
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VIA_DIRB = 0x02, // direction B
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VIA_DIRA = 0x03, // direction A
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VIA_T1CL = 0x04, // low-order timer 1 counter
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VIA_T1CH = 0x05, // high-order timer 1 counter
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VIA_T1LL = 0x06, // low-order timer 1 latches
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VIA_T1LH = 0x07, // high-order timer 1 latches
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VIA_T2CL = 0x08, // low-order timer 2 latches
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VIA_T2CH = 0x09, // high-order timer 2 counter
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VIA_SR = 0x0A, // shift register
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VIA_ACR = 0x0B, // auxiliary control register
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VIA_PCR = 0x0C, // periheral control register
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VIA_IFR = 0x0D, // interrupt flag register
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VIA_IER = 0x0E, // interrupt enable register
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VIA_ANH = 0x0F, // input/output register A, no handshake
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};
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/** VIA interrupt flags */
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@ -93,11 +93,11 @@ enum class ViaLine {
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CB2
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};
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/** Cuda communication signals. */
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/** Cuda communication signals (active low -> 0 - true, 1 - false). */
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enum {
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CUDA_TIP = 0x20, /* transaction in progress: 0 - true, 1 - false */
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CUDA_BYTEACK = 0x10, /* byte acknowledge: 0 - true, 1 - false */
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CUDA_TREQ = 0x08 /* Cuda requests transaction from host */
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CUDA_TIP = 0x20, // transaction in progress
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CUDA_BYTEACK = 0x10, // byte acknowledge/handshake
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CUDA_TREQ = 0x08 // Cuda requests transaction from host
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};
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/** Cuda packet types. */
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@ -111,41 +111,41 @@ enum {
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/** Cuda pseudo commands. */
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enum {
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CUDA_WARM_START = 0x00, /* warm start */
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CUDA_START_STOP_AUTOPOLL = 0x01, /* start/stop device auto-polling */
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CUDA_READ_MCU_MEM = 0x02, /* read internal Cuda memory */
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CUDA_GET_REAL_TIME = 0x03, /* get real time */
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CUDA_READ_PRAM = 0x07, /* read parameter RAM */
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CUDA_WRITE_MCU_MEM = 0x08, /* write internal Cuda memory */
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CUDA_SET_REAL_TIME = 0x09, /* set real time */
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CUDA_POWER_DOWN = 0x0A, /* power down system */
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CUDA_WRITE_PRAM = 0x0C, /* write parameter RAM */
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CUDA_MONO_STABLE_RESET = 0x0D, /* mono stable reset */
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CUDA_RESTART_SYSTEM = 0x11, /* restart system */
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CUDA_FILE_SERVER_FLAG = 0x13, /* set file server flag */
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CUDA_SET_AUTOPOLL_RATE = 0x14, /* set auto-polling rate */
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CUDA_GET_AUTOPOLL_RATE = 0x16, /* get auto-polling rate */
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CUDA_SET_DEVICE_LIST = 0x19, /* set device list */
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CUDA_GET_DEVICE_LIST = 0x1A, /* get device list */
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CUDA_ONE_SECOND_MODE = 0x1B, /* one second interrupt mode */
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CUDA_SET_POWER_MESSAGES = 0x21, /* set power message flag */
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CUDA_READ_WRITE_I2C = 0x22, /* read/write I2C device */
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CUDA_COMB_FMT_I2C = 0x25, /* combined format I2C transaction */
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CUDA_OUT_PB0 = 0x26, /* output one bit to Cuda's PB0 line */
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CUDA_WARM_START = 0x00, // warm start
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CUDA_START_STOP_AUTOPOLL = 0x01, // start/stop device auto-polling
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CUDA_READ_MCU_MEM = 0x02, // read internal Cuda memory
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CUDA_GET_REAL_TIME = 0x03, // get real time
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CUDA_READ_PRAM = 0x07, // read parameter RAM
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CUDA_WRITE_MCU_MEM = 0x08, // write internal Cuda memory
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CUDA_SET_REAL_TIME = 0x09, // set real time
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CUDA_POWER_DOWN = 0x0A, // power down system
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CUDA_WRITE_PRAM = 0x0C, // write parameter RAM
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CUDA_MONO_STABLE_RESET = 0x0D, // mono stable reset
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CUDA_RESTART_SYSTEM = 0x11, // restart system
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CUDA_FILE_SERVER_FLAG = 0x13, // set file server flag
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CUDA_SET_AUTOPOLL_RATE = 0x14, // set auto-polling rate
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CUDA_GET_AUTOPOLL_RATE = 0x16, // get auto-polling rate
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CUDA_SET_DEVICE_LIST = 0x19, // set device list
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CUDA_GET_DEVICE_LIST = 0x1A, // get device list
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CUDA_ONE_SECOND_MODE = 0x1B, // one second interrupt mode
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CUDA_SET_POWER_MESSAGES = 0x21, // set power message flag
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CUDA_READ_WRITE_I2C = 0x22, // read/write I2C device
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CUDA_COMB_FMT_I2C = 0x25, // combined format I2C transaction
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CUDA_OUT_PB0 = 0x26, // output one bit to Cuda's PB0 line
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};
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/** Cuda error codes. */
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enum {
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CUDA_ERR_BAD_PKT = 1, /* invalid packet type */
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CUDA_ERR_BAD_CMD = 2, /* invalid pseudo command */
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CUDA_ERR_BAD_SIZE = 3, /* invalid packet size */
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CUDA_ERR_BAD_PAR = 4, /* invalid parameter */
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CUDA_ERR_I2C = 5 /* invalid I2C data or no acknowledge */
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CUDA_ERR_BAD_PKT = 1, // invalid packet type
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CUDA_ERR_BAD_CMD = 2, // invalid pseudo command
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CUDA_ERR_BAD_SIZE = 3, // invalid packet size
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CUDA_ERR_BAD_PAR = 4, // invalid parameter
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CUDA_ERR_I2C = 5 // invalid I2C data or no acknowledge
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};
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#define CUDA_IN_BUF_SIZE 256
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/** PRAM addresses within Cuda's internal memory */
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/** PRAM addresses within Cuda's internal memory. */
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#define CUDA_PRAM_START 0x100 // starting address of PRAM
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#define CUDA_PRAM_END 0x1FF // last byte of PRAM
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#define CUDA_ROM_START 0xF00 // starting address of ROM containing Cuda FW
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@ -264,4 +264,4 @@ private:
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uint8_t dev_addr, uint8_t sub_addr, uint8_t dev_addr1, const uint8_t* in_buf, int in_bytes);
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};
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#endif /* VIACUDA_H */
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#endif // VIACUDA_H
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