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appleramdac: Fix clock divisor 1x.

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If bits 6 and 7 are 3, then the divisor should be 1 instead of 16.
0 -> 2x
1 -> 4x
2 -> 8x
3 -> 1x (not 16x).
This change affects RGB 12 inch dislay 512 x 384 60Hz mode in Platinum.
This commit is contained in:
joevt
2024-05-04 22:49:42 -07:00
committed by dingusdev
parent e7eb1c8a66
commit f53a7cce32
1 changed files with 1 additions and 1 deletions
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2
devices/video/appleramdac.cpp
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@@ -168,7 +168,7 @@ void AppleRamdac::iodev_write(uint32_t address, uint16_t value) {
}
int AppleRamdac::get_clock_div() {
return 1 << ((dac_cr >> 6) + 1);
return 1 << (((dac_cr >> 6) + 1) & 3);
}
int AppleRamdac::get_pix_width() {