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appleramdac: Fix clock divisor 1x.
If bits 6 and 7 are 3, then the divisor should be 1 instead of 16. 0 -> 2x 1 -> 4x 2 -> 8x 3 -> 1x (not 16x). This change affects RGB 12 inch dislay 512 x 384 60Hz mode in Platinum.
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@ -168,7 +168,7 @@ void AppleRamdac::iodev_write(uint32_t address, uint16_t value) {
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}
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}
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int AppleRamdac::get_clock_div() {
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int AppleRamdac::get_clock_div() {
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return 1 << ((dac_cr >> 6) + 1);
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return 1 << (((dac_cr >> 6) + 1) & 3);
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}
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}
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int AppleRamdac::get_pix_width() {
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int AppleRamdac::get_pix_width() {
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