Commit Graph

69 Commits

Author SHA1 Message Date
Maxim Poliakovski
90f22d8066 Initial Houdini2 emulation. 2022-08-29 12:04:34 +02:00
Maxim Poliakovski
ee9448cbc6 Initial support for Nubus/PDS. 2022-08-29 02:55:28 +02:00
Maxim Poliakovski
5b08f283e5 Hacks for debugging HW interrupts. 2022-08-27 17:38:53 +02:00
joevt
e41b196977 Fix return value for bad pci config address
PCI config read fails should return all 1 bits.
All unused registers in an existing PCI device should return 0.

Because that's what my Power Mac 8600 returns when I run my Open Firmware lspci command.
Any bus/device/function that doesn't exist returns FF and won't be listed by lspci.
Any registers that are unused will show as 00 in the lspci output.

Make grackle log bus:device.function @register.size in all cases.
2022-08-24 07:58:12 -07:00
Maxim Poliakovski
994f8d7155 viacuda: fix interrupts. 2022-08-24 14:15:48 +02:00
joevt
1ccc8d1a25 Fix setenv and printenv
- Allow changing integer variables. Previously they could not be changed.
- Allow changing string variables. Previously they could only be changed if their length increased.
- printenv had a bug with strings longer than 32 characters.
- printenv now translates carriage return (used in nvramrc) as endl (which should perform carriage return and linefeed)
- For integers, setenv assumes decimal number input but if that fails it will try hex conversion. 0x prefix for hex numbers is optional unless the number only has digits 0 - 9.
- setenv converts linefeed to carriage return for string variables. nvramrc requires this for proper editing in Open Firmware.
- Added Open Firmware 2.4 nvram field names to OfNvramHdr comments.
2022-08-22 17:20:04 -07:00
joevt
3ee2ea1871 Fix read/write argument names
base class uses reg_start so derived classes should do the same.
Some derived class already uses reg_start for read method.
2022-08-22 17:16:22 -07:00
joevt
3b4f40635a Register offsets should be logged as hex
- decimal values are confusing (can't tell if 12 means 12 or 18)
- most specs show hex values for register offsets.
2022-08-22 17:16:22 -07:00
joevt
c644d1609f PCI Expansion ROM size should be power of 2
The expansion rom base register indicates the size of the expansion rom by the number of bits that remain zero after code attempts to set them all to 1. For example, a result of fffe0000 means 128K. The 11 least significant bits are ignored in the size calculation, which means the minimum rom size is indicated by fffff800 = 2K.

Handle the case where an expansion rom file might not have a size that is a multiple of 2 or is not greater than 2K.
Bytes between the end of the file and the end of the calculated rom size are set to 0xff.
2022-08-22 17:16:22 -07:00
joevt
d843091a4d Allow setting PCI capabilities pointer
The capabilities pointer is usually a constant, but whatever the capabilities pointer points to has to be handled by the derived class.
2022-08-22 17:16:22 -07:00
joevt
6fad095730 Allow setting PCI status register
Don't always return 0 when reading it. The status register contains some bits that Open Firmware uses to set some properties.
A PCI device can set a default status register value to set those bits.
	this->status = 0x02B0; // 0000  0 01 0  1 0 1 1  0000 Capabilities List, 66 MHz, Fast Back-to-Back, DevSel Speed: Medium
2022-08-22 17:16:22 -07:00
joevt
6af8b52376 changes to pci logging
For invalid or unsupported PCI accesses, do the following:
- log a device's full pci address using pciutils setpci command format bb:dd.f @rr.s (bus:device:function @register+offset.size).
- report as read or write access.
- log value for writes.
- bus, device, function, and register values cannot be determined from Invalid IDSEL values so they will output as ??.
- for invalid IDSEL values, report the entire value of the config_addr.
- for valid IDSEL values, the bus number cannot be determined since IDSEL only specifies device number. It's probably bus 00 but we'll show ?? to indicate an IDSEL type access.

Add missing config type read access logging for chaos.
2022-08-22 17:16:17 -07:00
joevt
63248b0fa2 Set Bandit's HWComponent name
Bandit has two names:
- PCIDevice->pci_name
- PCIDevice:MMIODevice:HWComponent->name
The latter was not being set.
2022-08-22 17:07:50 -07:00
joevt
cd122ce263 Open Firmware is two words
Not OpenFirmware.
Also fixed a spelling mistake and removed some extra spaces.
2022-08-22 16:47:38 -07:00
Maxim Poliakovski
e097b7a0a1 bandit: fix return value for empty slots. 2022-08-22 15:05:35 +02:00
Maxim Poliakovski
32b8c8ed43 pcidevice: fix expansion ROM mapping. 2022-08-20 12:51:08 +02:00
Maxim Poliakovski
56c54e4c8c pcihost: add attach_pci_device method. 2022-08-19 18:55:33 +02:00
Maxim Poliakovski
4964008511 machineid: improve Gossamer ID description. 2022-08-15 20:49:06 +02:00
joevt
93fae1ee68 Merge remote-tracking branch 'upstream/master' 2022-08-14 16:38:51 -07:00
Maxim Poliakovski
8cdbd9f81f Generic I2C PROM emulation. 2022-08-14 23:01:55 +02:00
joevt
b76bfedf4b Remove unnecessary linefeeds from log
To remove blank lines in the dingusppc.log file or in the console output when -d is used.
2022-08-14 05:26:56 -07:00
Maxim Poliakovski
b67644ba35 athens: support ID reading & dot clock disabling. 2022-08-11 01:43:29 +02:00
Maxim Poliakovski
5463c8e6cb athens: fix compilation with GCC. 2022-08-07 15:32:05 +02:00
Maxim Poliakovski
bd19914132 Initial emulation of the Athens clock ASIC. 2022-08-07 15:25:58 +02:00
Maxim Poliakovski
e3900b9062 bandit: add Chaos support. 2022-08-06 19:29:45 +02:00
Maxim Poliakovski
ea0fb3b410 bandit: initialize address mask register. 2022-07-25 12:51:55 +02:00
Maxim Poliakovski
b8915f11a2 debugger: fix ofnvram commands for Nubus machines. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
9971052a78 mesh: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
7db0a31cc5 nvram: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
41a314d6d6 bandit: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
2dfc160e30 sc53c94: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
66debbc730 viacuda: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
06001a778f GCC compilation fixes. 2022-05-21 15:10:40 +02:00
Maxim Poliakovski
ed02a06bb8 pcidevice: loading of expansion ROMs from files. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
5b7e79b979 Bandit: implement I/O space transactions. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
bfd48eeeb2 Bandit: implement address mask register. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
4225f0aec2 ofnvram: implement changing of string variables. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
a7e06f4e4b Utility class for viewing/changing OF NVRAM variables. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
4b2f3cedc7 Make NVRAM a full-fledged HW component. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
d863fa0c80 Bandit: use common PCI configuration code. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
1f67a57d7b Common code for handling PCI config space. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
8d9691cc6f MESH: add MeshScsi namespace. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
4b32e9bd30 Initial emulation of the Platinum Memory controller. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
23a046d889 Refine Bandit config address handling. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
cdb34032bc Initial emulation of the Bandit ARBus-to-PCI bridge. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
74f4dbd7e6 pcihost: pull common code from Grackle. 2022-05-21 14:51:26 +02:00
dingusdev
36fa53e8c1 MSVC compilation fixes 2022-03-12 15:43:45 -07:00
Maxim Poliakovski
edd3979647 Cuda: increase size of the input buffer. 2022-02-19 23:23:24 +01:00
Maxim Poliakovski
2525398b6e SWIM3: add support for floppy DMA. 2022-02-15 15:53:18 +01:00
Maxim Poliakovski
0d3fd01fef Improve emulation of the VIA timers. 2022-02-13 03:02:17 +01:00