17 Commits

Author	SHA1	Message	Date
Maxim Poliakovski	a00b87790b	sc3c94: implement real DMA.	2022-11-07 12:34:55 +01:00
Maxim Poliakovski	ca5f81417f	sc53c94: refactor state machine.	2022-11-07 12:34:42 +01:00
Maxim Poliakovski	5a59b97257	Sc53C94: implement cycle completion commands.	2022-11-02 22:28:43 +01:00
Maxim Poliakovski	0c74ebbc45	scsi_bus: support status and message in.	2022-11-02 21:27:18 +01:00
Maxim Poliakovski	2865a611e7	Sc53C94: implement reading the FIFO register.	2022-11-02 21:19:31 +01:00
Maxim Poliakovski	c54c1cdb65	Sc53C94: improve status register.	2022-11-01 02:11:06 +01:00
Maxim Poliakovski	6ffe28a8a4	Implement SCSI Pseudo-DMA register on PDM.	2022-11-01 01:17:50 +01:00
Maxim Poliakovski	7ab44886c4	Sc53C94: implement information transfer command.	2022-11-01 01:17:50 +01:00
Maxim Poliakovski	fbfae98d6d	scsi_bus: packet data transfers.	2022-10-31 23:21:35 +01:00
Maxim Poliakovski	c7ceb9d6b9	sc53c94: fix setting internal transfer counter.	2022-10-31 23:21:35 +01:00
Maxim Poliakovski	a58c9b1a62	ScsiDevice: fix process_command() signature.	2022-10-27 14:07:20 +02:00
Maxim Poliakovski	eeb576a927	Improve ScsiDevice class.	2022-10-25 02:53:21 +02:00
Maxim Poliakovski	2dfc160e30	sc53c94: self-registration with the device registry.	2022-07-18 20:27:34 +02:00
Maxim Poliakovski	00093bdc95	sc53c94: support interrupts.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	7c53620a40	sc53c94: implement sequencer and some commands.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	dc34f282b7	53C94: support more registers and commands.	2022-01-24 22:55:49 +01:00
Maxim Poliakovski	5883524fb8	53C94: chip initialization and identification.	2022-01-22 04:37:52 +01:00