Commit Graph

200 Commits

Author SHA1 Message Date
joevt
07f57a1e9b Remove extra semi-colons. 2023-08-04 20:11:59 -07:00
joevt
0c9ddaccf7 Fix dppc debugger printenv of multiline variables.
If a nvram variable has CRLF or CR, replace them with LF so each line appears on a new line in the console output.
Also, add indent to each line so that each line appears only in the value column and not in the name column.
2023-08-04 20:11:59 -07:00
dingusdev
b23bb04dac Start fix for SCSI Hard Drive 2023-08-02 07:53:19 -07:00
dingusdev
a7601c36bd Started work on keyboard input 2023-08-01 22:43:11 -07:00
Maxim Poliakovski
1a883ba73e viacuda: implement basic autopolling. 2023-08-02 00:07:17 +02:00
Maxim Poliakovski
2e50b364c4 adbmouse: emulate single button mouse. 2023-08-01 23:58:29 +02:00
Maxim Poliakovski
233ab778b6 adbmouse: support for movement data in R0. 2023-08-01 17:18:46 +02:00
Maxim Poliakovski
c254749493 viacuda: connect to new AdbBus device. 2023-07-26 04:50:05 +02:00
Maxim Poliakovski
fd9f8c90a5 Basic ADB mouse device emulation.
For now, it solely handles the basic ADB commands.
2023-07-26 04:40:20 +02:00
Maxim Poliakovski
0a0761c7e0 AdbDevice - the base class for ADB devices. 2023-07-26 04:35:07 +02:00
Maxim Poliakovski
e9d91175c4 Add AdbBus class and device. 2023-07-26 04:29:08 +02:00
Maxim Poliakovski
0c0166b565 viacuda: fix packet response protocol.
Cuda needs to negate TREQ before sending the last byte of a
fixed-length response to avoid transfering an extraneous byte.
2023-07-26 04:22:08 +02:00
Maxim Poliakovski
a9f73e7384 hwcomponent: fix size of the component type enum. 2023-07-23 16:32:00 +02:00
Maxim Poliakovski
f7a1412ec7 atapibasedevice: fix task file initialization on reset. 2023-07-09 02:10:48 +02:00
Maxim Poliakovski
10b8366219 hwcomponent: add Ethernet MAC type. 2023-07-08 01:23:18 +02:00
Maxim Poliakovski
0687b0c60e New ATAPI CD-ROM implementation. 2023-06-18 23:36:46 +02:00
Maxim Poliakovski
fc26be3e24 atapibasedevice: implement PIO transfers.
Also move ATAPI CD-ROM related stuff to separate
source and implement various helpers.
2023-06-18 23:33:57 +02:00
Maxim Poliakovski
a4cac2df81 atabasedevice: interrupt support. 2023-06-18 23:30:06 +02:00
Maxim Poliakovski
ac267b3daa idechannel: support devices registration and interrupts. 2023-06-18 23:24:19 +02:00
Maxim Poliakovski
cb347434d3 hwinterrupt: add IDE interrupts. 2023-06-18 23:22:51 +02:00
Maxim Poliakovski
d113c4cf7a ATAPI Features bit definitions. 2023-06-18 23:06:04 +02:00
Maxim Poliakovski
7a8b534c07 More SCSI commands and error codes. 2023-06-18 23:04:02 +02:00
Maxim Poliakovski
ee7b2838bc One more attempt to fix GCC build. 2023-05-30 19:55:46 +02:00
Maxim Poliakovski
6f247f64cd ScsiBus: add missing include. 2023-05-30 19:51:07 +02:00
Maxim Poliakovski
0b2fd60308 Fix Gazelle crash by adding PCI slot properties. 2023-05-30 19:48:40 +02:00
Maxim Poliakovski
f809124a2e Improve SCSI bus registration. 2023-05-30 19:46:27 +02:00
Maxim Poliakovski
586828b375 Base class for ATAPI devices. 2023-05-15 17:57:20 +02:00
Maxim Poliakovski
e36150a5ca Add ATAPI commands, clean up formatting. 2023-05-15 17:57:20 +02:00
Maxim Poliakovski
0f8e68d4bf Rework ATA reset logic. 2023-05-15 17:57:20 +02:00
Maxim Poliakovski
57ea3c2e66 dbdma: implement interrupt processing. 2023-04-22 22:52:03 +02:00
Maxim Poliakovski
03595c3940 Merge remote-tracking branch 'origin/machine-yosemite' 2023-04-21 12:49:58 +02:00
Maxim Poliakovski
ed48766e5f atahd: cosmetic improvements. 2023-04-17 09:56:03 +02:00
Maxim Poliakovski
cf0d361918 Merge 'hard-disks' branch. 2023-04-17 01:20:38 +02:00
Maxim Poliakovski
09da0c6109 nvram: use smart pointers, fix initialization. 2023-04-17 00:03:36 +02:00
Maxim Poliakovski
49f47c5f3f bandit: attach devices from the CLI. 2023-04-02 03:01:13 +02:00
Maxim Poliakovski
c188d0251a ofnvram: support CHRP style OF config partition. 2023-02-25 18:14:42 +01:00
Maxim Poliakovski
3234f21cab Overhaul audio codec classes. 2023-02-25 18:14:42 +01:00
Maxim Poliakovski
71b2e6c1fa dbdma: implement optional command branching.
This feature is used by New World BootROMs for producing
error beeps with different duration and count.
2023-02-15 02:36:40 +01:00
Maxim Poliakovski
ad2fc290ec Initial DEC 21154 P2P bridge emulation. 2023-02-15 02:36:40 +01:00
Maxim Poliakovski
094b3b5312 Fix Cuda response protocol. 2023-02-08 21:26:11 +01:00
Maxim Poliakovski
7e5451a97d Cosmetics: break long lines, fix indentation. 2023-02-08 11:41:37 +01:00
joevt
bee24b166d Add method to attach PCI device with new name.
- Added an overloaded version of attach_pci_device which takes a suffix string that can be used to make a device name unique so that multiple devices of the same class can be added to a machine. The method returns a PCIDevice which can be easily used to attach more PCI devices if it is a PCIHost.
2023-02-05 07:17:29 -08:00
joevt
f61854a0ae Add has_io_space flag.
PCIDevice
- supports_io_space method now uses a flag has_io_space which is automatically set for PCI bridges or PCI devices that have an I/O BAR.

atirage
- Devices that have I/O BARs don't need a supports_io_space method.

mpc106
- Devices that don't have I/O methods don't need a supports_io_space method.
2023-02-05 07:17:28 -08:00
joevt
99eb93f9e1 Add set_irq_pin method.
A multi-function device may have functions of the same class (e.g. a USB device with two OHCI functions) but each function should be initialized with a different interrupt pin.
2023-02-05 07:17:28 -08:00
joevt
be45a6a020 Add PCI bridge and multi-function device support.
Add PCI bridge and multi-function device support.
Overview:
- A multi-function device is two or more PCIDevices with the same device number but one device is function zero (as with currently implemented PCIDevices) and the other functions have function numbers between 1 and 7. The device number and function number are properties of the PCIDevice's parent PCIHost connection.
- A PCIBridge is a PCIHost (it can connect child PCI devices) and a PCIDevice (it has config space, BARs, and expansion ROM).
- A PCIDevice has Type 0 header. It has 6 BARs.
- A PCIBridge has Type 1 header. It has 2 BARs. The config space registers beginning from offset 0x18 differ from those of a PCIDevice.

Possible future modifications:
- Add a PCICardBus class. It is a PCIHost. It has Type 2 header. It has one BAR. The first 20 bytes match Type 0 and Type 1 headers. These exist in New World Macs. They allow hot-plug of PCI devices.
- Split base PCI registers (first 16 bytes) into a PCIBase class. Type 1 and 2 have two or one BAR but I think all 6 BARs belong in PCIBase class anyway.
- Split PCIHost into two classes: Currently existing PCIHosts (Bandit, Grackle) are PCIHost and PCIRoot (they have the broadcast I/O requests functionality) while PCIBridge is PCIHost only - it can propagate I/O requests but does not originate the broadcast.
- pci_register_mmio_region should maybe return a pointer to a region struct so that it can be used for unregistering or modifying the region's range. This may be useful for PCI bridges which have ranges that may constrain memory BARs of their downstream devices.

PCIDevice
- Moved expansion ROM BAR handling to a separate function pci_wr_exp_rom_bar so that it can be used by both PCI devices and PCI bridges which have the ROM BAR in different locations. It now supports unmapping expansion ROM. Also made exp_rom_bar not writable if there's no ROM.
- Added num_bars field which specifies the number of valid BARs since Type 0, 1, and 2 headers have different number of BARs.
- map_exp_rom_mem now properly unmaps expansion ROM (using new function unmap_exp_rom_mem) before mapping it again.
- Added function set_multi_function which modifies hdr_type to indicate if a device has other functions. This is to be applied only to devices with function number 0.

PCIHost
- When attaching a PCI device, it will check if it's a multi-function device (there exists an attached function that is not zero) and adjust hdr_type of function 0 of the device accordingly.
- Attached PCI bridges are added to a list of PCI bridges attached to the host.
- Added pci_io_read_loop and pci_io_write_loop which loop through attached PCI devices to find one that will perform the action for the given I/O address without logging an error (since some other device might perform the action).
- Added pci_io_read_broadcast and pci_io_write_broadcast which are used by a PCI root (bandit/grackle). They will log an error if the action is not performed. They should probably do a machine check exception to match real Power Macs.
- pci_find_device (used by PCI root) will recursively find a PCIDevice for type 1 config register accesses.
- Logging from PCIHost now includes the name of the PCIHost instead of just "PCIHost" because there can be multiple PCI hosts.

PCIBridge
- Sets num_bars to 2 and hdr_type to 1.
- I/O ranges set in the config registers are handled correctly by pci_io_read and pci_io_write.
- Memory ranges set in the config registers do not currently affect memory mmio regions. It is assumed that Open Firmware and the OS will set the ranges and BARs correctly to allow all BARs to be accessed fully.

bandit, mpc106
- Bandit and Grackle now call pci_io_read_broadcast and pci_io_read_broadcast to pass I/O accesses to downstream PCI devices.
- Chaos is modified to work like Bandit even though it will never have PCI bridges attached or devices that support I/O accesses. It's simpler this way.
2023-02-05 07:17:28 -08:00
joevt
b472123746 Standardize PCIDevice slot_id for PCIHost.
PCIHost
- PCIHosts (bandit and grackle) now use device number and function number for identifying attached PCIDevices. A macro DEV_FUN is added to calculate this new slot_id. Bandit no longer uses IDSEL. Grackle no longer uses only device number.

machinecatalyst, machinegossamer, machinetnt
- Use DEV_FUN to attach PCI devices by device number and function number.
2023-02-05 06:57:04 -08:00
joevt
f7280c316b Fix 64 bit BAR.
A 64 bit BAR has least significant 32 bits first as in the original pull request.
2023-02-05 01:22:01 -08:00
Maxim Poliakovski
cc17035e67 pcidevice: improve BAR configuration. 2023-02-04 17:57:46 +01:00
joevt
2a64f547cc Add 64-bit BAR support.
While dingusppc only emulates 32-bit Macs (for now), it is possible for a 32-bit Power Mac to use a PCIe card that has 64-bit BARs.

finish_config_bars is added to scan the cfg values of the BARs and determine their type. The type is stored separately so that it does not need to be determined again.
The type can be I/O (16 or 32 bit) or Mem (20 or 32 or 64 bit). A 64 bit bar is two BARs, the second contains the most significant 32 bits.

set_bar_value uses the stored type instead of trying to determine the type itself. It is always called even when the firmware is doing sizing. For sizing, It does the job of setting the bar value so do_bar_sizing is now just a stub.

Every PCIDevice that has a BAR needs to call finish_config_bars after setting up the cfg values just as they need to setup the cfg values. Since they need to do both, maybe the cfg values should be arguments of finish_config_bars, then finish_config_bars() should be renamed config_bars().
2023-02-02 02:47:34 -08:00
joevt
fba2ff4231 Corrections for refactors.
- Macros need parenthesis to enforce operation order when expanded.
- Fix device and register numbers in log messages.
- Unmapped I/O space reads don't necessarily return 0xffffffff. That's only for config space reads. Just return 0. Unhandled I/O space read should probably cause a memory check (TEA - Transfer Error Acknowledge) exception as it does on a Power Mac 8600.
2023-02-02 02:47:34 -08:00