40 Commits

Author	SHA1	Message	Date
Maxim Poliakovski	41a314d6d6	bandit: self-registration with the device registry.	2022-07-18 20:27:34 +02:00
Maxim Poliakovski	2dfc160e30	sc53c94: self-registration with the device registry.	2022-07-18 20:27:34 +02:00
Maxim Poliakovski	66debbc730	viacuda: self-registration with the device registry.	2022-07-18 20:27:34 +02:00
Maxim Poliakovski	06001a778f	GCC compilation fixes.	2022-05-21 15:10:40 +02:00
Maxim Poliakovski	ed02a06bb8	pcidevice: loading of expansion ROMs from files.	2022-05-21 14:51:27 +02:00
Maxim Poliakovski	5b7e79b979	Bandit: implement I/O space transactions.	2022-05-21 14:51:27 +02:00
Maxim Poliakovski	bfd48eeeb2	Bandit: implement address mask register.	2022-05-21 14:51:27 +02:00
Maxim Poliakovski	4225f0aec2	ofnvram: implement changing of string variables.	2022-05-21 14:51:27 +02:00
Maxim Poliakovski	a7e06f4e4b	Utility class for viewing/changing OF NVRAM variables.	2022-05-21 14:51:27 +02:00
Maxim Poliakovski	4b2f3cedc7	Make NVRAM a full-fledged HW component.	2022-05-21 14:51:27 +02:00
Maxim Poliakovski	d863fa0c80	Bandit: use common PCI configuration code.	2022-05-21 14:51:27 +02:00
Maxim Poliakovski	1f67a57d7b	Common code for handling PCI config space.	2022-05-21 14:51:26 +02:00
Maxim Poliakovski	8d9691cc6f	MESH: add MeshScsi namespace.	2022-05-21 14:51:26 +02:00
Maxim Poliakovski	4b32e9bd30	Initial emulation of the Platinum Memory controller.	2022-05-21 14:51:26 +02:00
Maxim Poliakovski	23a046d889	Refine Bandit config address handling.	2022-05-21 14:51:26 +02:00
Maxim Poliakovski	cdb34032bc	Initial emulation of the Bandit ARBus-to-PCI bridge.	2022-05-21 14:51:26 +02:00
Maxim Poliakovski	74f4dbd7e6	pcihost: pull common code from Grackle.	2022-05-21 14:51:26 +02:00
dingusdev	36fa53e8c1	MSVC compilation fixes	2022-03-12 15:43:45 -07:00
Maxim Poliakovski	edd3979647	Cuda: increase size of the input buffer.	2022-02-19 23:23:24 +01:00
Maxim Poliakovski	2525398b6e	SWIM3: add support for floppy DMA.	2022-02-15 15:53:18 +01:00
Maxim Poliakovski	0d3fd01fef	Improve emulation of the VIA timers.	2022-02-13 03:02:17 +01:00
Maxim Poliakovski	9f3f46603f	AMIC: handle SWIM3 interrupts.	2022-02-07 23:10:17 +01:00
Maxim Poliakovski	b25b526582	hwcomponent: add floppy disk drive component type.	2022-02-06 15:20:07 +01:00
Maxim Poliakovski	00093bdc95	sc53c94: support interrupts.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	298135fd7a	AMIC: process VIA2 interrupts.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	7c53620a40	sc53c94: implement sequencer and some commands.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	b5f70feb28	Initial SCSI bus emulation.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	5c177cc50f	Simplify registration of HW component types.	2022-01-26 16:45:21 +01:00
Maxim Poliakovski	dc34f282b7	53C94: support more registers and commands.	2022-01-24 22:55:49 +01:00
Maxim Poliakovski	5883524fb8	53C94: chip initialization and identification.	2022-01-22 04:37:52 +01:00
Maxim Poliakovski	0899186ffc	ViaCuda: implement post-initialization.	2022-01-21 12:42:05 +01:00
Maxim Poliakovski	c1208b398e	Add posti-initialization to HW components.	2022-01-21 12:42:05 +01:00
Maxim Poliakovski	4867a68e11	VIA: public method for asserting control lines.	2022-01-21 11:08:32 +01:00
Maxim Poliakovski	9c4e6c8a86	Rewrite ViaCuda to support SR and T2 interrupts.	2022-01-10 17:56:24 +01:00
Maxim Poliakovski	c218badd5a	Clean up some ctors/dtors.	2022-01-10 17:56:24 +01:00
Maxim Poliakovski	d9d8384d4a	Add interrupt controller interface and definitions.	2022-01-10 17:56:24 +01:00
dingusdev	84ded9fc7a	Added further CUDA commands	2021-11-10 07:56:50 -07:00
Maxim Poliakovski	392fa87ba4	Add NCR 53C90 stub.	2021-10-26 19:00:04 +02:00
Maxim Poliakovski	c0cd6eb38f	Add missing licence headers, update license date.	2021-10-23 21:00:31 +02:00
Maxim Poliakovski	9329d56d83	Move devices into dedicated subdirectories.	2021-10-23 20:17:47 +02:00