111 Commits

Author	SHA1	Message	Date
Maxim Poliakovski	449cc96612	Basic MESH emulation.	2023-01-25 20:58:30 +01:00
Maxim Poliakovski	8002737124	Basic O'Hare I/O controller emulation.	2022-12-23 17:19:46 +01:00
Maxim Poliakovski	a892842b8f	Refactor ATA/IDE classes.	2022-12-07 22:36:25 +01:00
dingusdev	58908621e6	IDE refinements	2022-12-05 08:42:51 -07:00
dingusdev	311538b81d	Fix IDE functionality	2022-11-26 21:34:54 -07:00
Maxim Poliakovski	a0dd1884b3	macio: properly wire floppy DMA.	2022-11-17 18:03:18 +01:00
Maxim Poliakovski	9f4c248e4c	Rework DBDMA logic for bidirectional channels.	2022-11-17 18:03:18 +01:00
Maxim Poliakovski	dac50fe0fb	GrandCentral: fix DMA dispatching.	2022-11-17 18:03:18 +01:00
Maxim Poliakovski	c87fc10376	amic: implement SCSI DMA.	2022-11-07 21:56:27 +01:00
Maxim Poliakovski	6ffe28a8a4	Implement SCSI Pseudo-DMA register on PDM.	2022-11-01 01:17:50 +01:00
Maxim Poliakovski	3f2b77fd59	amic: basic writing to the VIA2 IFR.	2022-10-31 23:21:35 +01:00
dingusdev	b480903c7a	Slight code clean-up ... Prevents crashing	2022-10-30 15:38:09 -07:00
dingusdev	aa1d23e08b	Fixed hard disk support ... Compiles, still unfinished	2022-10-22 11:41:52 -07:00
dingusdev	ee9573327c	Reorganized hard disk code ... Not compiling yet.	2022-10-08 16:51:54 -07:00
Maxim Poliakovski	6c59bf4203	heathrow: fix interrupt processing.	2022-08-24 14:58:07 +02:00
Maxim Poliakovski	bb77b2d525	grandcentral: fix interrupt processing.	2022-08-24 14:58:07 +02:00
Maxim Poliakovski	293c5a40f3	amic: fix PDM interrupts.	2022-08-24 14:58:07 +02:00
joevt	3ee2ea1871	Fix read/write argument names ... base class uses reg_start so derived classes should do the same. Some derived class already uses reg_start for read method.	2022-08-22 17:16:22 -07:00
joevt	b76bfedf4b	Remove unnecessary linefeeds from log ... To remove blank lines in the dingusppc.log file or in the console output when -d is used.	2022-08-14 05:26:56 -07:00
Maxim Poliakovski	56db0426a4	heathrow: fix EMMO bit.	2022-08-08 21:06:57 +02:00
Maxim Poliakovski	cd1d0031e6	GC: implement attachable IOBus devices.	2022-08-07 15:25:58 +02:00
Maxim Poliakovski	c3939e3b25	Gossamer: factory test control.	2022-07-20 20:08:37 +02:00
Maxim Poliakovski	f0553720d6	Catalyst: factory test control.	2022-07-20 01:36:45 +02:00
Maxim Poliakovski	3c062443f6	PDM: factory test control.	2022-07-20 01:36:05 +02:00
Maxim Poliakovski	c0078ce97d	Refactor MachineBase and MachineFactory classes. ... Adding new machines is much easier now. A significant amount of duplicated code has been reduced.	2022-07-18 20:27:34 +02:00
Maxim Poliakovski	9056d53474	macio: self-registration with the device registry.	2022-07-18 20:27:34 +02:00
Maxim Poliakovski	ca51c34157	amic: self-registration with the device registry.	2022-07-18 20:27:34 +02:00
Maxim Poliakovski	5668fc161f	macio: fix SWIM3 register space accesses.	2022-06-13 23:15:48 +02:00
Maxim Poliakovski	8889759f33	GrandCentral: improve error logging.	2022-05-21 14:45:33 +02:00
Maxim Poliakovski	533edf6ef5	GrandCentral: properly connect Curio SCSI.	2022-05-17 13:27:58 +02:00
Maxim Poliakovski	d4c08bbe31	Fix ESCC register addressing.	2022-05-07 21:47:22 +02:00
Maxim Poliakovski	4d87ed9b38	Make NVRAM a full-fledged HW component.	2022-03-29 01:55:11 +02:00
Maxim Poliakovski	d71a7b8694	GrandCentral: basic device interrupt handling.	2022-03-28 18:33:59 +02:00
Maxim Poliakovski	e01d0e3d59	GrandCentral: external SCSI (Curio style).	2022-03-28 18:26:47 +02:00
Maxim Poliakovski	4525fd50cc	GrandCentral: fix access to NVRAM subdevice.	2022-03-28 18:26:47 +02:00
Maxim Poliakovski	29ce960dbf	GrandCentral: access to ESCC and board reg 1.	2022-03-28 18:26:47 +02:00
Maxim Poliakovski	276cd37cfe	Heathrow: interrupt registers & mode 1 interrupts.	2022-03-14 18:13:47 +01:00
Maxim Poliakovski	1500c63e26	Initial emulation of the GrandCentral I/O controller.	2022-03-14 18:13:47 +01:00
Maxim Poliakovski	4c45b3dfa2	Heathrow: use common PCI configuration code.	2022-03-14 18:13:47 +01:00
Maxim Poliakovski	3235018260	amic: fix MACE register range.	2022-03-14 18:13:47 +01:00
Maxim Poliakovski	c946693450	escc: unify compatible and MacRISC addressing.	2022-02-26 10:57:13 +01:00
Maxim Poliakovski	579a56f749	AMIC: implement floppy DMA channel.	2022-02-15 15:54:21 +01:00
Maxim Poliakovski	cfb8977f09	AMIC: implement floppy DMA registers.	2022-02-13 23:47:45 +01:00
Maxim Poliakovski	9f3f46603f	AMIC: handle SWIM3 interrupts.	2022-02-07 23:10:17 +01:00
Maxim Poliakovski	298135fd7a	AMIC: process VIA2 interrupts.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	5c177cc50f	Simplify registration of HW component types.	2022-01-26 16:45:21 +01:00
Maxim Poliakovski	5883524fb8	53C94: chip initialization and identification.	2022-01-22 04:37:52 +01:00
Maxim Poliakovski	3bdc6f915a	AMIC: implement periodic VBL (60.15 Hz) interrupt.	2022-01-21 12:42:05 +01:00
Maxim Poliakovski	d61d1d71eb	Add interrupt processing to AMIC.	2022-01-10 17:56:24 +01:00
Maxim Poliakovski	d4ecb77b24	pdmonboard: enable periodic video updates.	2022-01-10 17:56:24 +01:00
Maxim Poliakovski	9a0c340712	Basic SWIM3 and Superdrive emulation.	2021-12-12 21:40:04 +01:00
Maxim Poliakovski	9caaf0f538	Basic emulation of the PDM on-board video.	2021-12-07 22:54:03 +01:00
Maxim Poliakovski	fff597075d	Monitor type can be now specified from the command line.	2021-12-06 00:40:40 +01:00
Maxim Poliakovski	609fb43726	Rewrite DisplayID to work with AMIC & ATI Rage.	2021-11-30 01:26:32 +01:00
Maxim Poliakovski	fc44cdcc83	Heathrow: logging monitor sense status.	2021-11-09 13:41:48 +01:00
Maxim Poliakovski	392fa87ba4	Add NCR 53C90 stub.	2021-10-26 19:00:04 +02:00
Maxim Poliakovski	87b8e1759a	Connect ESCC to AMIC and Heathrow.	2021-10-25 22:19:45 +02:00
Maxim Poliakovski	3f20d0a700	heathrow: use unique_ptr with internal objects.	2021-10-25 22:19:45 +02:00
Maxim Poliakovski	6a756df5e3	Add MACE Ethernet emulation stub.	2021-10-24 21:02:30 +02:00
Maxim Poliakovski	c0cd6eb38f	Add missing licence headers, update license date.	2021-10-23 21:00:31 +02:00
Maxim Poliakovski	9329d56d83	Move devices into dedicated subdirectories.	2021-10-23 20:17:47 +02:00