Commit Graph

153 Commits

Author SHA1 Message Date
dingusdev
38d94e509f Further code cleanup 2024-02-14 22:19:08 -07:00
dingusdev
ec23a532f6 Minor clean-up for branching instructions 2024-02-12 20:59:04 -07:00
joevt
d0b0b8070c ppcopcodes: Fix l*ux? invalid form check.
Invalid form is (reg_a == reg_d) || reg_a == 0.
Therefore, valid form is (reg_a != reg_d) && reg_a != 0
!(a || b) == !a && !b
2024-02-11 07:41:13 -07:00
joevt
ff895aa8a4 ppcfpopcodes: Remove some globals.
ppc_result64_d and ppc_dblresult64_d don't need to be globals. The rest are unused.
2024-02-10 13:56:07 -07:00
joevt
6c49b87a06 ppcopcodes: Fix rlwnm when shift > 31. 2024-02-10 12:54:41 -07:00
joevt
29e5bbdcc0 ppcopcodes: Fix divw. 2024-02-10 12:54:12 -07:00
dingusdev
52dfc0cf93 Slightly faster typecasting 2024-01-31 08:06:33 -07:00
joevt
bf425884fb ppcopcodes: Add ppc_grab_dab.
For instructions that don't use the general purpose registers.
2024-01-19 12:09:24 +01:00
joevt
4430fd89a9 ppcopcodes: Fix subfic. 2024-01-19 12:00:55 +01:00
dingusdev
a0b1d6394a Another revert
This affects Virtus VR - With the lmw checks, the opening sign doesn't display and the intro crashes sooner
2024-01-07 17:45:05 -07:00
dingusdev
c6af1e31fe Partial revert of previous commit 2024-01-07 17:21:11 -07:00
dingusdev
a5ce6a806f CPU clean-up 2024-01-07 17:04:51 -07:00
dingusdev
a59475af1c Further lha(*) fixes 2024-01-05 19:10:05 -07:00
dingusdev
1cc1ac2e68 Fixing lha(*) opcodes 2024-01-05 17:19:03 -07:00
dingusdev
f3a759c80d CPU code clean-up 2024-01-05 15:11:37 -07:00
Maxim Poliakovski
cb85d358d1 Remove unused globals. 2024-01-02 17:51:12 +01:00
Maxim Poliakovski
5b114c2412 ppcopcodes: refactor mtcrf emulation. 2024-01-02 17:44:35 +01:00
Maxim Poliakovski
593508df22 Refactor subfze. 2024-01-02 13:44:56 +01:00
joevt
1f3505f371 ppcopcodes: Fix subfze. 2024-01-02 13:44:13 +01:00
Maxim Poliakovski
fef5bde0c7 Refactor recent subfme fix. 2023-12-24 02:56:47 +01:00
joevt
dc00879419 ppcopcodes: Fix subfme. 2023-12-24 02:36:34 +01:00
joevt
0a8c1df968 ppcopcodes: Fix sraw. 2023-12-19 16:30:02 +01:00
joevt
4c49558120 ppcopcodes: Fix subfe. 2023-12-19 14:57:41 +01:00
joevt
7f229b0fe8 ppcfpopcodes: Fix fcmpo/fcmpu.
It was always changing CR1 (starting at CR bit 4) instead of the CR selected by crfD.
Also, it was clearing all but the FL,FG,FE,FU bits of FPRF of FPSCR.
2023-12-19 13:15:10 +01:00
Mihai Parparita
e9bc8926ab Avoid some undefined behavior
The `SubOpcode31Grabber[1024] = { ppc_illegalop }` initializer only
populates the first entry with ppc_illegalop (at least on some compilers),
switch to explicitly initializing the entire array with std::fill_n.

Also fix a couple of sign and overflow issues flagged by the Xcode
undefined behavior sanitizer.
2023-12-07 23:59:49 -08:00
dingusdev
dd454689e0 Fixes for condition reg move instructions 2023-11-28 07:06:04 -07:00
dingusdev
7835aec034 Further CPU cleanup 2023-11-21 08:06:50 -07:00
dingusdev
f4f035682c Fixed cfloat include 2023-11-19 20:34:40 -07:00
dingusdev
d1f9b5631a Added missing include for cfloat 2023-11-19 20:07:00 -07:00
Mihai Parparita
35c86ad6bf Clean up #includes
Result of running IWYU (https://include-what-you-use.org/) and
applying most of the suggestions about unncessary includes and
forward declarations.

Was motivated by observing that <thread> was being included in
ppcopcodes.cpp even though it was unused (found while researching
the use of threads), but seems generally good to help with build
times and correctness.
2023-11-03 00:33:47 -07:00
dingusdev
6ffc2b2f10 Optimize string word instructions
Partially unrolled the loop. Boots 7.1.2 Disk Tools slightly faster.
2023-10-29 17:23:31 -07:00
Maxim Poliakovski
6cfde29f00 heathrow: implement native interrupt mode. 2023-09-25 12:22:17 +02:00
Maxim Poliakovski
278799795c Disable decrementer exceptions for MPC601. 2023-09-18 21:20:59 +02:00
Maxim Poliakovski
8ff2125312 Revert "Minor checks for Data Cache opcodes and LMW"
This reverts commit fd6327ab62.
2023-09-18 21:20:59 +02:00
dingusdev
5e32b599d6 Merge branch 'master' of https://github.com/dingusdev/dingusppc 2023-09-04 07:22:27 -07:00
dingusdev
fd6327ab62 Minor checks for Data Cache opcodes and LMW 2023-09-04 07:21:00 -07:00
Maxim Poliakovski
932f2bbceb ppcopcodes: fix stwcx. emulation. 2023-08-21 04:50:02 +02:00
joevt
300965ab10 Decrementer exception changes. 2023-08-10 00:46:04 +02:00
Maxim Poliakovski
73d0356058 ppcopcodes: fix dcbz for BlockZero in Mac OS 8.x 2023-06-17 20:57:48 +02:00
Maxim Poliakovski
03595c3940 Merge remote-tracking branch 'origin/machine-yosemite' 2023-04-21 12:49:58 +02:00
Maxim Poliakovski
cf0d361918 Merge 'hard-disks' branch. 2023-04-17 01:20:38 +02:00
Maxim Poliakovski
597c077b19 Implement PPC decrementer. 2023-02-15 02:36:40 +01:00
joevt
64fec88436 Fix compiler warnings: cast loses precision.
Use explicit cast when converting large integer types to smaller integer types when it is known that the most significant bytes are not required.
For pcidevice, check the ROM file size before casting to int. We'll allow expansion ROM sizes up to 4MB but usually they are 64K, sometimes 128K, rarely 256K.
for machinefactory, change the type to size_t so that it can correctly get the size of files that are larger than 4GB; it already checks the file size is 4MB before we need to cast to uint32_t.
For floppyimg, check the image size before casting to int. For raw images, only allow files up to 2MB. For DiskCopy42 images, it already checks the file size, so do the cast after that.
2023-01-11 01:17:12 -08:00
dingusdev
1ed6e25d1b Removed redundant variable
Slight clean-up for lswi and lswx
2022-11-12 20:16:29 -07:00
joevt
6f0d3b48ba Fix TBR range
Fixed an issue where TBR doesn't have full 64-bit range. The original calculation was 64 bit and ended with a ÷ 10^9. This means the max for the upper 32 bits is 2^32/10^9 = 4. The solution is to use a multiplication method that supports a 96 bit product. core/mathutils.h contains functions for that. TBR driving frequency is assumed to be less than 1 GHz. Some minor modification is required for future > 1 GHz support.
2022-09-15 21:22:37 -07:00
joevt
b665f2cb4e Fix RTC units
Fixed an issue where get-msecs-601 and get-msecs-60x were not returning the same value. RTC was being calculated using timebase frequency instead of nanosecond frequency. 601 uses RTC. 60x uses TBR. On a real Mac, a G3 CPU won't have a RTC and accessing RTC would cause an exception. This is not the case for dingusppc but I don't think that's a problem.
2022-09-15 21:05:08 -07:00
joevt
ed424ad544 Fix setting RTC
Fixed an issue where setting RTC upper or lower doesn't adjust the other (since the current time has changed since the last timestamp).
2022-09-15 20:59:56 -07:00
joevt
50dbd5eccd Fix RTC not always updating
Fixed an issue where RTC was not being updated if only the upper 32 bits (seconds) was read.
Also simplified things by always updating the timestamp instead of only when the seconds changes.
2022-09-15 20:54:22 -07:00
joevt
01d7d6bac3 Make accessing RTC or TBR not affect the other
Fixed an issue where the following would cause inconsistent results (tb in the left column would sometimes decrement instead of always incrementing):
2 0 do 2 0 do cr tb@ 8 u.r ." ." 8 u.r loop 2 0 do cr 12 spaces rtc@ 8 u.r ." ." 8 u.r loop 2 0 do cr tb@ 8 u.r ." ." 8 u.r space rtc@ 8 u.r ." ." 8 u.r loop loop

RTC and TBR could not be used simultaneously because they are both incremented by an amount based on the last time stamp but that time stamp can be changed by accessing either RTC or TBR. The solution is to have a different time stamp for each.
2022-09-15 20:21:54 -07:00
joevt
ce925f5e56 Fix RTC upper
Fixed a typo that caused rtc@ to always return 0 for the upper 32 bits (represents seconds).
The problem could cause the following to hang on Power Mac 7500:
cr 2000 0 do get-msecs u. 1 ms loop
2022-09-15 19:34:46 -07:00