Commit Graph

1173 Commits

Author SHA1 Message Date
Maxim Poliakovski
47d2e235a3 atirage: prevent big-endian accesses outside VRAM.
The simplest solution is to cut the aperture size by the amount
of video RAM installed. This way, accesses to the big-endian
aperture located above the installed VRAM will be catched and
reported by the MMU.
2023-10-03 14:18:12 +02:00
Maxim Poliakovski
576912dd55 displayid: prevent reading past EDID data. 2023-10-03 00:42:03 +02:00
joevt
5b366e592c Fix spelling. 2023-10-02 15:06:51 +02:00
joevt
170a9d78e7 Fix comment. 2023-10-02 15:06:06 +02:00
Maxim Poliakovski
63b10175bf mesh: stubs for BusFree and EnaReselect commands. 2023-10-02 15:01:27 +02:00
Maxim Poliakovski
a5fb124e69 pdmonboard: switch to mmu_map_dma_mem. 2023-10-02 15:00:12 +02:00
Maxim Poliakovski
72d45fb0de amic: switch DMA code to mmu_map_dma_mem. 2023-10-02 14:48:25 +02:00
Maxim Poliakovski
f754f63f8f dbdma: fix LOAD_QUAD and STORE_QUAD to work with MMIO. 2023-10-02 14:46:52 +02:00
Maxim Poliakovski
8cf290c034 ppcmmu: add mmu_map_dma_mem method. 2023-10-02 02:20:42 +02:00
Maxim Poliakovski
b408a02ef9 dbdma: implement LOAD_QUAD, STORE_QUAD and NOP. 2023-09-30 17:09:45 +02:00
joevt
67146028bf ppcmmu: Add 64-bit accesses to I/O.
Also add an exception for unaligned 64 bit. 64 bit accesses require dword alignment.
2023-09-30 00:29:01 +02:00
joevt
acdb14a10a Recalculate execution block after RFI.
While booting Mac OS X 10.2 installer CD, a return from RFI didn't change the instruction address virtual memory page but did change the physical memory page so we must always recalculate the physical address after RFI.
Perhaps there are other cases where this may be required?
2023-09-26 00:13:11 +02:00
joevt
dcd4384d46 Fix eb_end calculation.
- Subtract one so that it can't overflow to zero.
- Use page_start as the base so mask operation is not required.
- Recalculate it only when the page changes.
2023-09-26 00:04:07 +02:00
joevt
8348370142 Add separate flags for instruction and data TLBs.
The same flag was being used for flushing both instruction and data TLBs so sometimes a flush for one TLB list would not occur if the flag was cleared when flushing the other TLB list.
2023-09-25 23:42:32 +02:00
joevt
6b3cdad877 ppcmmu: Fix BAT update.
Need to schedule flush of both BAT and PAT type TLBs because BAT takes precedence over PAT which means updating a BAT can invalidate a PAT.
2023-09-25 23:27:00 +02:00
joevt
6b40caf63a ppcmmu: fix setting of LRU bits. 2023-09-25 23:17:57 +02:00
Maxim Poliakovski
99f596ea19 cdromdrive: clean-up and extend READ_TOC command. 2023-09-25 23:17:57 +02:00
joevt
637844269f atapicdrom: Implement sector areas for Read CD.
The disk cache is unchanged. data_ptr continues to be only used for the user data sector area for each block. The other sector areas (synch, header, etc.) are filled in while reading.

has_data and get_data exist as a way to bypass data_ptr for parts of the transfer outside the user data sector area of each block. The default behaviour is defined in atabasedevice and is overridden by atapicdrom for the Read CD command. atapicdrom has a flag doing_sector_areas to control the behavior of the get_data method. When the flag is true, the sector_areas, current_block, and current_block_byte are used for selecting the correct data from one of the sector areas. The Read CD command initializes those variables. xfer_cnt remains the total number of bytes to be transferred and is now not necessarily the same as the number of disk image blocks read into the disk cache.

lba_to_msf is used to fill in the header. The values was not verified using a real CD.

Mac OS X just cares about the Mode in the header. For now, only the synch and header and user data areas are filled in. The other areas read as all zeros.
2023-09-25 12:22:17 +02:00
joevt
ec5bf8e985 atapicdrom: Implement READ(6) and READ(10). 2023-09-25 12:22:17 +02:00
joevt
4bbc5ab0af CD-ROM: Fix interpretation of session number.
In Read TOC format 2, Mac OS X passes zero for Session Number. I believe Read TOC is supposed to return the first session starting from that number so it should return info for Session 1 as it would if Mac OS X passed 1 for the Session Number.
2023-09-25 12:22:17 +02:00
Maxim Poliakovski
6cfde29f00 heathrow: implement native interrupt mode. 2023-09-25 12:22:17 +02:00
Maxim Poliakovski
c115a887d8 heathrow: fix processing of emulated interrupts. 2023-09-25 02:14:29 +02:00
Maxim Poliakovski
4cdb81e822 mesh: fix Arbitrate command for OS X. 2023-09-24 22:36:44 +02:00
Maxim Poliakovski
f4f7edcc28 heathrow: add Ethernet DBDMA channels. 2023-09-22 00:11:19 +02:00
Maxim Poliakovski
ae97d7bcc7 Improve zdoc/bmac documentation. 2023-09-22 00:10:19 +02:00
Maxim Poliakovski
5f48a3ab5b bigmac: support more registers. 2023-09-22 00:09:17 +02:00
Maxim Poliakovski
9db3076a48 dbdma: support INT_SELECT & WAIT_SELECT registers. 2023-09-20 00:45:39 +02:00
Maxim Poliakovski
6eb6a5892d bigmac: fix/improve PHY interface. 2023-09-20 00:44:08 +02:00
Maxim Poliakovski
0ebcd15a3d heathrow: connect DMA channel for MESH. 2023-09-19 14:19:15 +02:00
Maxim Poliakovski
04acf120d6 dbdma: support optinal CommandPtrHi register.
It's written with zero in OS X. This dummy implementation
is meant to reduce log warnings.
2023-09-19 14:16:13 +02:00
Maxim Poliakovski
278799795c Disable decrementer exceptions for MPC601. 2023-09-18 21:20:59 +02:00
Maxim Poliakovski
c47cbb354d Add is_601 flag for selecting MPC601 specific behavior. 2023-09-18 21:20:59 +02:00
Maxim Poliakovski
8ff2125312 Revert "Minor checks for Data Cache opcodes and LMW"
This reverts commit fd6327ab62.
2023-09-18 21:20:59 +02:00
Maxim Poliakovski
a69763c6de dbdma: noop incomplete LOAD_QUAD & STORE_QUAD. 2023-09-18 20:20:25 +02:00
dingusdev
5e32b599d6 Merge branch 'master' of https://github.com/dingusdev/dingusppc 2023-09-04 07:22:27 -07:00
dingusdev
fd6327ab62 Minor checks for Data Cache opcodes and LMW 2023-09-04 07:21:00 -07:00
Mihai Parparita
732977db27 Minimal changes to get an Emscripten build
Disable stack traces in loguru (excinfo.h is not available in Emscripten)
and set Emscripten linker flags.
2023-08-30 23:12:43 -07:00
Maxim Poliakovski
45528bfc6d ppcmmu: fix flushing of the secondary ITLB. 2023-08-22 23:36:48 +02:00
Maxim Poliakovski
c690049246
Merge pull request #47 from joevt/ofnvram-branch
ofnvram changes
2023-08-22 08:24:57 +02:00
Maxim Poliakovski
932f2bbceb ppcopcodes: fix stwcx. emulation. 2023-08-21 04:50:02 +02:00
dingusdev
a7ef177164 Preliminary DBDMA expansion 2023-08-13 16:38:15 -07:00
joevt
300965ab10 Decrementer exception changes. 2023-08-10 00:46:04 +02:00
Maxim Poliakovski
d2e7c9a5df ppcexceptions: fix next address for decrementer exceptions. 2023-08-09 12:53:48 +02:00
Maxim Poliakovski
ee9c692115 mesh: implement more register reads. 2023-08-09 01:40:09 +02:00
Maxim Poliakovski
de1f0c8a9b ppc_mmu: rename reg_desc to rgn_desc to improve readability. 2023-08-07 13:56:49 +02:00
Maxim Poliakovski
52a64168d7 Clean up previous merge. 2023-08-07 13:45:26 +02:00
Maxim Poliakovski
b571ff8412 Revert "ppcmmu: Add 64-bit accesses to I/O"
This reverts commit 16123dea45.
2023-08-07 13:06:11 +02:00
Maxim Poliakovski
762319055c
Merge pull request #50 from joevt/mmu-changes-branch
mmu changes
2023-08-07 12:58:46 +02:00
Maxim Poliakovski
cd9ccb66ed adbkeyboard: fix compiler warning. 2023-08-07 12:51:09 +02:00
joevt
ac64f9e30d ppcmmu: Fix mmio read/write offset calculation.
For TLBs referencing an mmio region, calculate an offset that will translate a guest virtual address to an offset in the mmio region.
2023-08-04 20:16:13 -07:00