Maxim Poliakovski
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da25e72668
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Fix ESCC register addressing.
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2022-05-21 14:51:27 +02:00 |
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Maxim Poliakovski
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4b2f3cedc7
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Make NVRAM a full-fledged HW component.
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2022-05-21 14:51:27 +02:00 |
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Maxim Poliakovski
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8be44dad82
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Heathrow: interrupt registers & mode 1 interrupts.
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2022-05-21 14:51:27 +02:00 |
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Maxim Poliakovski
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fc3901676b
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Heathrow: use common PCI configuration code.
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2022-05-21 14:51:27 +02:00 |
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Maxim Poliakovski
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c946693450
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escc: unify compatible and MacRISC addressing.
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2022-02-26 10:57:13 +01:00 |
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Maxim Poliakovski
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5c177cc50f
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Simplify registration of HW component types.
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2022-01-26 16:45:21 +01:00 |
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Maxim Poliakovski
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9a0c340712
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Basic SWIM3 and Superdrive emulation.
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2021-12-12 21:40:04 +01:00 |
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Maxim Poliakovski
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fc44cdcc83
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Heathrow: logging monitor sense status.
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2021-11-09 13:41:48 +01:00 |
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Maxim Poliakovski
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87b8e1759a
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Connect ESCC to AMIC and Heathrow.
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2021-10-25 22:19:45 +02:00 |
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Maxim Poliakovski
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3f20d0a700
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heathrow: use unique_ptr with internal objects.
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2021-10-25 22:19:45 +02:00 |
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Maxim Poliakovski
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9329d56d83
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Move devices into dedicated subdirectories.
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2021-10-23 20:17:47 +02:00 |
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