Macintosh-Tools/dingusppc
1
0
Fork 0
mirror of https://github.com/dingusdev/dingusppc.git synced 2024-11-18 22:05:51 +00:00
Code Issues Projects Releases Wiki Activity
1,814 Commits 32 Branches 2 Tags 16 MiB
5710758dd7
Commit Graph

58 Commits

Author SHA1 Message Date
joevt
14f75d834a macio: Add list of OHare/Heathrow bits. 2024-04-12 19:54:34 -07:00
Maxim Poliakovski
45d2c8854d Revert "macio: Add fatman bits register." 
This reverts commit 8aaf211c5b.
 2024-04-11 17:18:20 +02:00
joevt
8aaf211c5b macio: Add fatman bits register. 
This register is used in the control ndrv to detect presence of connected S-Video or composite video display.
 2024-04-10 20:48:29 -07:00
joevt
be27ceed00 machinetnt: Remove sixty6 and mesh properties. 
Use the presence of the devices in the MachineDescription to determine these.
 2024-04-10 20:19:43 -07:00
joevt
7007e002e6 macio: Make interrupt flags atomic. 
So they can be modified by other threads.
 2024-04-02 19:05:57 -07:00
joevt
2c097da12d grandcentral: Add escc DMA. 2024-03-30 14:55:24 -07:00
joevt
1d9b0f7fa5 macio: Add MIO_AUX_CTRL enum. 2024-03-28 07:10:05 -07:00
joevt
31036b8dee grandcentral: Add sound in DMA. 2024-03-09 06:03:33 -07:00
joevt
6f231f3367 grandcentral: IOBus changes. 
- Add IOBusDevice (nvram_addr_hi_dev) for NVRAM addr hi.
- Add IOBusDevice (nvram_dev) for NVRAM data.
- Make all IOBusDevices use the same code.
- Log error if 4 least significant bits of offset are not zero.
- Correctly byte swap the value before passing it to the IOBusDevice.
- When reading, duplicate the bytes in a word or dword like a real Power Mac does.
 2024-03-09 06:02:23 -07:00
joevt
b5bb214920 ohare: Interrupt fixes. 
Based on work done for grandcentral.
 2024-03-07 07:58:54 -07:00
joevt
1e78512c95 Rename Curio and Mesh. 2024-03-02 11:12:45 -07:00
joevt
8a800062dd grandcentral: Add DMA channel enum. 2024-02-12 14:06:19 +01:00
Maxim Poliakovski
28e7a806b4 grandcentral: use MeshStub on machines without MESH. 2024-02-12 02:38:38 +01:00
Maxim Poliakovski
a0e56aa4cf grandcentral: connect external SCSI HW. 2024-02-12 02:17:09 +01:00
Maxim Poliakovski
b3e3b73159 grandcentral: connect MESH HW. 2024-02-12 02:17:09 +01:00
Maxim Poliakovski
ce2f6ddadd grandcentral: cleanup interrupt acknowledgement. 2024-02-12 01:46:21 +01:00
Maxim Poliakovski
078aa79270 grandcentral: remove board register 1 stub. 2023-12-10 00:19:44 +01:00
dingusdev
7eb2fd23c3 Fixing typos 2023-12-01 14:04:26 -07:00
Maxim Poliakovski
f4f7edcc28 heathrow: add Ethernet DBDMA channels. 2023-09-22 00:11:19 +02:00
Maxim Poliakovski
0ebcd15a3d heathrow: connect DMA channel for MESH. 2023-09-19 14:19:15 +02:00
Maxim Poliakovski
7bb7ff9f0f heathrow: human-readable DBDMA channel names. 2023-07-24 15:20:52 +02:00
Maxim Poliakovski
742003b6f3 Basic BigMac Ethernet controller emulation. 
Emulates MII and some PHY configuration registers.
 2023-07-08 01:27:01 +02:00
Maxim Poliakovski
22798fe14e Fix compilation of the audio codec classes. 2023-04-23 21:04:24 +02:00
Maxim Poliakovski
44478b6937 heathrow: implement floppy DMA interrupts. 2023-04-22 22:53:20 +02:00
Maxim Poliakovski
03595c3940 Merge remote-tracking branch 'origin/machine-yosemite' 2023-04-21 12:49:58 +02:00
Maxim Poliakovski
cf0d361918 Merge 'hard-disks' branch. 2023-04-17 01:20:38 +02:00
Maxim Poliakovski
5d7450df90 heathrow: locate sound HW by type. 
That allows using sound codecs other than Screamer with Heathrow.
 2023-02-25 18:14:42 +01:00
Maxim Poliakovski
449cc96612 Basic MESH emulation. 2023-01-25 20:58:30 +01:00
Maxim Poliakovski
8002737124 Basic O'Hare I/O controller emulation. 2022-12-23 17:19:46 +01:00
Maxim Poliakovski
a892842b8f Refactor ATA/IDE classes. 2022-12-07 22:36:25 +01:00
dingusdev
58908621e6 IDE refinements 2022-12-05 08:42:51 -07:00
dingusdev
311538b81d Fix IDE functionality 2022-11-26 21:34:54 -07:00
Maxim Poliakovski
a0dd1884b3 macio: properly wire floppy DMA. 2022-11-17 18:03:18 +01:00
dingusdev
aa1d23e08b Fixed hard disk support 
Compiles, still unfinished
 2022-10-22 11:41:52 -07:00
dingusdev
ee9573327c Reorganized hard disk code 
Not compiling yet.
 2022-10-08 16:51:54 -07:00
Maxim Poliakovski
6c59bf4203 heathrow: fix interrupt processing. 2022-08-24 14:58:07 +02:00
Maxim Poliakovski
bb77b2d525 grandcentral: fix interrupt processing. 2022-08-24 14:58:07 +02:00
joevt
3ee2ea1871 Fix read/write argument names 
base class uses reg_start so derived classes should do the same.
Some derived class already uses reg_start for read method.
 2022-08-22 17:16:22 -07:00
Maxim Poliakovski
cd1d0031e6 GC: implement attachable IOBus devices. 2022-08-07 15:25:58 +02:00
Maxim Poliakovski
c3939e3b25 Gossamer: factory test control. 2022-07-20 20:08:37 +02:00
Maxim Poliakovski
f0553720d6 Catalyst: factory test control. 2022-07-20 01:36:45 +02:00
Maxim Poliakovski
c0078ce97d Refactor MachineBase and MachineFactory classes. 
Adding new machines is much easier now.
A significant amount of duplicated code has been reduced.
 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
9056d53474 macio: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
5668fc161f macio: fix SWIM3 register space accesses. 2022-06-13 23:15:48 +02:00
Maxim Poliakovski
d71a7b8694 GrandCentral: basic device interrupt handling. 2022-03-28 18:33:59 +02:00
Maxim Poliakovski
e01d0e3d59 GrandCentral: external SCSI (Curio style). 2022-03-28 18:26:47 +02:00
Maxim Poliakovski
29ce960dbf GrandCentral: access to ESCC and board reg 1. 2022-03-28 18:26:47 +02:00
Maxim Poliakovski
276cd37cfe Heathrow: interrupt registers & mode 1 interrupts. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
1500c63e26 Initial emulation of the GrandCentral I/O controller. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
4c45b3dfa2 Heathrow: use common PCI configuration code. 2022-03-14 18:13:47 +01:00