joevt
6738d7472e
ppcmmu: Add a function to get phys address.
...
Since the function is for the debugger during stepping or disassembly, don't do extra logging.
2024-03-01 19:48:52 -07:00
joevt
500f38a496
ppcmmu: Add phys address to mmu_translate_imem.
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For debugging.
2024-03-01 19:45:09 -07:00
joevt
3a5a70b56d
ppcmmu: Allow convert virtual to physical address.
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The TLBEntries allow converting virtual guest address to virtual host address but there's no easy way to get a guest physical address for debugging purposes.
Add a phys_tag field to fix that.
2024-03-01 19:42:25 -07:00
joevt
15e132c824
cmake: Add header files in CMakeLists.txt.
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So they will appear in Xcode project.
mkdir -p dingusppc/build-xcode
cd dingusppc/build-xcode
cmake -G Xcode ..
xcodebuild -configuration Release
2024-03-01 19:41:43 -07:00
dingusdev
2b3cf58b8a
Continued clean-up
2024-03-01 19:40:46 -07:00
dingusdev
ebac8b92ba
Clean-up for loading instructions
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Expanding the scope of the clean-up from lscbx to other loading/storing instructions.
2024-03-01 07:57:46 -07:00
joevt
6a4326af39
poweropcodes: lscbx cleanup.
2024-03-01 07:46:04 -07:00
joevt
ff5c43e6cb
debugger: Add mregs command.
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To dump more registers.
2024-02-29 21:46:44 -07:00
joevt
7cd3aae753
debugger: Fix repeated until.
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The loop needs to be do while instead of while do.
2024-02-29 18:57:11 -07:00
joevt
fe05b1de12
Fix compiler warnings.
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Xcode build has compiler warnings involving loss of precision. Remove them by adding type casts. Check results in some cases for overflow.
2024-02-29 18:49:14 -07:00
joevt
1903c8b557
debugger: Fix reg_op for floating point registers.
2024-02-29 18:48:59 -07:00
joevt
456a96042f
debugger: Shorten try catch in reg_op.
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Because SPGR0 matches SPR but stoul causes an exception.
2024-02-29 07:55:09 -07:00
joevt
888df0ac53
debugger: Add more register names for reg_op.
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So the debugger can output their values.
2024-02-29 07:46:16 -07:00
Maxim Poliakovski
0c3f399de3
poweropcodes: fix compiler warning.
2024-02-24 22:51:05 +01:00
Maxim Poliakovski
45ccabb11d
poweropcodes: improve lscbx emulation.
2024-02-24 22:46:54 +01:00
dingusdev
d71a213c4b
Continued clean-up, part 3
2024-02-22 19:46:34 -07:00
dingusdev
8e9123bdce
Slightly less clumsy check for compiler
2024-02-21 07:14:21 -07:00
dingusdev
9dad9ea38b
Revert Memory exceptions use mmu handler.
2024-02-20 18:22:55 -07:00
dingusdev
1d938c93b6
Mask fixes for sr(*)
2024-02-20 18:15:08 -07:00
joevt
35bc1bcb44
poweropcodes: Fix sriq.
2024-02-20 18:07:38 -07:00
joevt
1438ebc12a
poweropcodes: Fix compiler warnings.
2024-02-20 18:07:26 -07:00
joevt
61b29f6fab
ppcexceptions: Memory exceptions use mmu handler.
2024-02-20 18:07:04 -07:00
joevt
0e3eaf724b
ppcfpopcodes: Fix stfs*, attempt #2 .
2024-02-20 02:04:02 +01:00
joevt
2a05ccbee1
ppcfpopcodes: Fix fres.
...
Don't convert to float until the end.
2024-02-20 02:03:41 +01:00
joevt
59bee01c0a
ppcfpopcodes: Fix fmsubs inf nan check.
...
There's probably still an issue with the inf_nan check
using reg_a for the first value instead of reg_a * reg_c.
This will probably need rewriting anyway.
2024-02-20 02:02:58 +01:00
joevt
4e4c8d71be
ppcfpopcodes: Fix fadds inf nan check.
2024-02-20 02:01:55 +01:00
joevt
c7ae31dfce
ppcfpopcodes: Spaces.
2024-02-20 02:01:37 +01:00
joevt
2ea80b0aab
ppcopcodes: Cleanup.
2024-02-20 01:59:54 +01:00
joevt
5bbf5ee3af
ppcopcodes: Fix divw overflow result.
2024-02-20 01:59:40 +01:00
joevt
748e9c5d86
ppcopcodes: Write protect XER zero bits.
2024-02-20 01:59:01 +01:00
joevt
8764beba39
ppcopcodes: Fix lswx.
...
- Remove invalid form check unless you know for sure it's supposed to cause an exception.
- Add register skip for 601 CPU. This needs testing.
2024-02-20 01:57:00 +01:00
joevt
cf4ce01ddd
ppcopcodes: set DSISR for alignment exception.
2024-02-20 01:22:55 +01:00
dingusdev
29f3ffd474
Continued clean-up, part 2
2024-02-18 07:06:27 -07:00
dingusdev
b160e38f8f
Continued code clean-up
2024-02-16 06:55:13 -07:00
dingusdev
38d94e509f
Further code cleanup
2024-02-14 22:19:08 -07:00
dingusdev
ec23a532f6
Minor clean-up for branching instructions
2024-02-12 20:59:04 -07:00
joevt
d0b0b8070c
ppcopcodes: Fix l*ux? invalid form check.
...
Invalid form is (reg_a == reg_d) || reg_a == 0.
Therefore, valid form is (reg_a != reg_d) && reg_a != 0
!(a || b) == !a && !b
2024-02-11 07:41:13 -07:00
joevt
fd81d7b040
ppcfpopcodes: Fix load float.
...
Type casting an int to a float assigns the value of the int to the float which is not what is needed here.
2024-02-11 07:40:17 -07:00
joevt
267a9448ea
ppctest: Fix floating-point tests.
...
genppctests.py
- Fix incorrect bits for some floating-point instruction opcodes or fields.
- Use separate register for FP results like DolphinPPCTests does.
- Remove extra FMULS.
- Use a regular expression for parsing ppcfloattest.txt. Don't parse the values, just put them in the output ppcloattests.csv file.
ppcfloattest.txt
- Clear crf0 and crf7 because we only care about crf1.
- Use values from DolphinPPCTests (0.0, 0.5, 1.0, 3.5, DBL_MAX, FLT_MAX, 2.4679999352, 4.9359998704, etc.). Some of the values were rounded. This will un-round them. Specify snan or qnan instead of nan.
- One of the FCMPO and FCMPU tests had qnan instead of snan input values.
ppcfloattest.csv
- Regenerate this file using the updated genppctests.py which uses the updated ppcfloattest.txt.
ppctests
- Update double_from_string to be able to parse the new values (snan, qnan, FLT_MAX, DBL_MAX).
2024-02-10 14:56:21 -07:00
joevt
01e45d656e
ppcfpopcodes: Update header date.
2024-02-10 14:47:46 -07:00
joevt
9199b1e520
ppcfpopcodes: Fix multiply add opcodes.
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Use std::fma for all of them for max accuracy.
For single precision opcodes, convert only the result, not the operands.
2024-02-10 14:19:09 -07:00
joevt
3be22dac99
ppcfpopcodes: No float cast for operand check.
2024-02-10 14:18:49 -07:00
joevt
ff895aa8a4
ppcfpopcodes: Remove some globals.
...
ppc_result64_d and ppc_dblresult64_d don't need to be globals. The rest are unused.
2024-02-10 13:56:07 -07:00
joevt
c9c4280e6e
ppcfpopcodes: No float cast for operand check.
2024-02-10 13:02:49 -07:00
joevt
dac9c1e52c
ppcfpopcodes: Fix fctiw* round to nearest.
...
0.3 should not round up to 1.
2024-02-10 12:58:58 -07:00
joevt
a7e6ab33a1
ppcfpopcodes: Make fctiw* results QNaN.
2024-02-10 12:58:29 -07:00
joevt
6c49b87a06
ppcopcodes: Fix rlwnm when shift > 31.
2024-02-10 12:54:41 -07:00
joevt
29e5bbdcc0
ppcopcodes: Fix divw.
2024-02-10 12:54:12 -07:00
joevt
4fcb357e2f
ppcfpopcodes: add 601 variant of mffs.
2024-02-10 12:51:48 -07:00
joevt
ddb5259464
ppcexec: Make illegal operations per CPU model.
2024-02-10 12:51:00 -07:00