Commit Graph

1437 Commits

Author SHA1 Message Date
joevt
67bd47f11f ppcopcodes: Fixes for bcctr(l)?.
Add MPC601 variants. Variants that decrement and test the ctr are invalid bon't don't appear to trigger an exception. The manual says MPC601 can decrement the counter. Other CPUs do not decrement the counter but will branch based on the value.
2024-03-07 06:55:54 -07:00
joevt
e44676e491 ppcfpopcodes: Template mffs variants. 2024-03-07 06:45:46 -07:00
joevt
7b4d513e22 videoctrl: Add change resolution support.
PDM defaults to 640x480.
If you set --mon_id to MacRGB12in then it would draw 512x384 inside a 640x480 window.
If you set --mon_id to Multiscan20in then it would try to draw 832x624 inside a 640x480 window and crash.
If you set the Monitors control panel to switch multiscan display from 640x480 to 832x624 and  restart then it would crash.
Now it will correctly change the window size every time the mode changes.
2024-03-06 21:44:10 -07:00
joevt
5b51cd06c0 atimach64gx: Add register names.
For logging.
2024-03-06 21:20:23 -07:00
joevt
052a47734f macio: Add DMA interrupts. 2024-03-06 21:19:04 -07:00
joevt
54767bf97d More interrupts.
- Add all the interrupts including DMA.
- Modify the Interrupt to IRQ_ID translation so the interrupts belonging to the first set of 32 interrupts don't need to be shifted.
2024-03-06 19:17:16 -07:00
joevt
e5bace03f7 Abort if register_dma_int.
Make register_dma_int cause Abort for heathrow and ohare like it does for amic.
2024-03-06 19:17:03 -07:00
joevt
691fcfb657 atimach64gx: PCI BAR changes.
Support changing BAR address.
2024-03-06 18:58:15 -07:00
joevt
49f7da4402 atimach64gx: Remove second column.
It incorrectly implies a relationship between items on the same row.
2024-03-06 18:57:52 -07:00
joevt
6c0ca42fff atimach64defs: Add more registers and bit fields. 2024-03-06 18:57:30 -07:00
Maxim Poliakovski
30c6cbefbd ppcexec: fix indentation, break long lines. 2024-03-06 23:28:40 +01:00
joevt
5a049642ea atirage: Add VBL callback. 2024-03-06 07:50:03 -07:00
joevt
b168459007 atirage: Calculate vert_blank. 2024-03-06 07:42:51 -07:00
joevt
d5c7b5f537 atirage: Add write CRTC_INT_CNTL. 2024-03-06 07:41:12 -07:00
joevt
506ed000a0 atirage: Add write CONFIG_STAT0. 2024-03-06 07:04:59 -07:00
joevt
b92e9216f4 atirage: Add write CRTC_VLINE_CRNT_VLINE.
For VLINE interrupt (but Mac OS X doesn't use enable VLINE interrupt).
2024-03-06 07:04:40 -07:00
joevt
6ff5079df8 atirage: Init CRTC_DISPLAY_DIS. 2024-03-06 07:04:25 -07:00
joevt
d686fc04f4 atirage: Fix crtc_update.
Add pixel format and pixel clock to the list of fields that will initiate a recalculation.
If frame rate is less than 24 or greater than 120 then assume 60Hz.
2024-03-05 08:02:50 -07:00
joevt
9aef78be4f atirage: Modify write CLOCK_CNTL.
Consider write-only bits: ATI_CLOCK_STROBE can't be read so clear it.
8 bits at Offset 2 is PLL_DATA. If we don't modify PLL_DATA, then insert the current value of PLL_DATA into the value that will be read from ATI_CLOCK_CNTL.
2024-03-05 08:02:20 -07:00
joevt
f6b1c080ad atirage: Init FIFO_CNT of GUI_STAT. 2024-03-05 07:54:19 -07:00
joevt
d4fa85688d atirage: Check both offset and size.
When checking if a particular byte of a register is accessed, check both the starting position (offset) and ending position (offset + size) of the bytes being access.
2024-03-05 07:52:12 -07:00
joevt
20b4a33c00 ppcexec: Remove EXHAUSTIVE_DEBUG. 2024-03-05 07:05:03 -07:00
joevt
f61055ebc0 ppcexec: Convert if to switch for ppc_opcode19. 2024-03-05 07:03:16 -07:00
joevt
777a02cbe9 pci: Use SIZE_ARG for logging arg size.
The SIZE_ARG macro defined in pcibase can be used outside pcibase with a small modification.
2024-03-04 21:16:46 -07:00
joevt
61b1940397 pci: Add command register mask.
The mask represents the list of bits that are allowed to change in the command register of PCI config space.
2024-03-04 21:16:38 -07:00
joevt
eef6d267c3 atirage: PCI BAR changes.
- Add BAR 2 decode. This BAR isn't actually used by Mac OS X, but decode it anyway just in case.
- Support updating of BARs (using change_one_bar method).
2024-03-04 21:13:07 -07:00
joevt
9c48c296c8 atirage: Register cleanup.
- Use register number instead of offset.
- Have one exit path from the read_reg and write_reg methods.
2024-03-04 21:11:56 -07:00
joevt
214c61669a videoctrl: Add pixel_format.
pixel_format is different than pixel_depth.
pixel_format depends on the GPU. A GPU might have multiple formats for the same depth.
We store this in videoctrl so that we can detect changes in pixel_format like we do for pixel_depth and active_width and active_height.
2024-03-04 21:11:42 -07:00
joevt
fb0396923f Fix dma STORE_QUAD and LOAD_QUAD.
When fetching DMA command, make sure to convert little endian fields to host endianness (i.e. don't use memcpy).
When fetching DMA command, return the host address of the DMA command for LOAD_QUAD. Maybe this address should be cached whenever this->cmdptr changes?
When fetching DMA command, return whether the DMA command is writable.
For LOAD_QUAD, pass the address of the DMA command to xfer_quad.
Always log unexpected DMA command values.
Write full 32-bit value for LOAD_QUAD.
Write reqCount to resCount.
2024-03-04 20:38:07 -07:00
joevt
6503a300cc Add PCI interrupt method.
A PCI device passes an interrupt to its host. The host will determine from the PCI device which interrupt to trigger.
2024-03-04 07:47:20 -07:00
joevt
be80595834 Remove obsolete pci config type 1 methods.
pci_find_device is the method used to pass pci config type 1 methods to child PCI devices.
2024-03-04 07:47:08 -07:00
joevt
54bda0ea95 pci: Change pci_conv_rd_data unaligned.
pci_conv_rd_data can be used to handle unaligned or 64-bit accesses in mmio regions if it's modified to include the next 32-bit value.
For pci config accesses, grackle repeats the 32-bit value. bandit uses a seemingly random number for the next 32-bit value, but we'll make it work like grackle.
2024-03-03 20:06:13 -07:00
joevt
6d23e18c11 pci: Add PCI CardBus bridge.
PCCard is used by PowerBook G3 Wallstreet in Open Firmware 2.0.1.
CardBus is probed in New World Macs starting from at least Open Firmware 4.1.9f1 sometime after Open Firmware 3.1.1.

- Create PCIBase from common stuff in PCIDevice.
- Add PCIBridgeBase. These have a primary bus number, secondary bus number, and subordinate bus number which are used to determine if PCI type 1 config cycle should be passed.
- Change PCIBridge to use PCIBridgeBase instead of PCIDevice.
- Add PCICardBusBridge which uses PCIBridgeBase.
2024-03-03 16:00:55 -07:00
joevt
5f8e7fcb73 pci: Log invalid BAR values.
For example, Old World Macs have versions of Open Firmware that don't support 512 MB BARs correctly. They may attempt to set such a BAR to 0x90000000 (a 256 MB boundary) instead of 0xA0000000 (the next available 512 MB boundary).
2024-03-03 15:49:59 -07:00
joevt
214b52a96a machinefactory: Fix spelling. 2024-03-03 15:13:29 -07:00
joevt
d426d0faeb Add settings when adding pci device. 2024-03-03 15:01:39 -07:00
joevt
ebb51addd7 debugger: Allow interrupt of disassembly.
Part of the "debugger: Fix interrupt signal." commit.
2024-03-03 14:36:24 -07:00
joevt
c64fab6ecb heathrow: Align read/write messages. 2024-03-03 12:03:06 -07:00
joevt
696bd6f316 mpc106: Remove pci_read and pci_write.
Because they are only called once and are small enough to include in read and write methods like they are in BanditHost.
2024-03-03 11:56:37 -07:00
joevt
7a3a661e2a platinum: Allow reading swatch registers. 2024-03-03 11:47:03 -07:00
joevt
f0949d296d platinum: Don't abort. 2024-03-03 11:46:40 -07:00
joevt
d2ebcb24b9 platinum: Use calculated fb_ptr for HW cursor. 2024-03-03 10:43:57 -07:00
joevt
644087b592 platinum: Fix fb_ptr calculation. 2024-03-03 10:43:40 -07:00
joevt
be2f5273d1 platinum: Init bank_base.
Because the constructor doesn't do it.
2024-03-03 10:43:25 -07:00
joevt
10053a8a1b atirage: Rename variable.
To match other occurrences in the same file.
2024-03-02 20:49:25 -07:00
joevt
9cefaec49c atirage: Spelling. 2024-03-02 20:44:39 -07:00
joevt
55b79c1518 atirage: Use register bit field names. 2024-03-02 20:44:08 -07:00
joevt
c2ab86d4ba atirage: Do something for hw cursor invert pixels.
Try a 50% alpha blend with black.
2024-03-02 20:43:54 -07:00
joevt
0e5fcde1e9 atirage: Add CUR_HORZ_VERT_OFF name. 2024-03-02 17:27:45 -07:00
joevt
002cce886c atirage: Indent. 2024-03-02 17:15:39 -07:00