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319 Commits 32 Branches 2 Tags 16 MiB
a243c79d0f
Commit Graph

59 Commits

Author SHA1 Message Date
Maxim Poliakovski
a243c79d0f Add support for PCI I/O space. 2020-03-31 21:12:06 +02:00
Maxim Poliakovski
a8c6298545 devices: skeleton for ATI Rage emulation. 2020-03-31 18:48:04 +02:00
Maxim Poliakovski
695044cf0e Support more than one I/O region per device. 2020-03-31 18:48:04 +02:00
dingusdev
1744f13fb4 Fixed build issues 2020-03-27 12:52:48 -07:00
dingusdev
f50f719b02 Started connecting ATI Rage 2020-03-27 12:43:29 -07:00
dingusdev
17200d5f35 Started work on ATI Rage 2020-03-27 10:54:25 -07:00
Maxim Poliakovski
35d6a2e011 Reduce logging when playing back audio. 2020-03-26 03:02:33 +01:00
Maxim Poliakovski
0d2301c006 Implement DMA pull method for sound output. 2020-03-26 02:07:43 +01:00
dingusdev
60ffa5bfac Initial attempt at fixing SDL2 building for Windows 2020-03-22 20:15:12 -07:00
Maxim Poliakovski
945e63bdb2 Implement DMA push method for sound. 2020-03-19 15:09:24 +01:00
Maxim Poliakovski
8e34c1657c Mock up DBDMA channel execution for sound. 2020-03-19 02:00:18 +01:00
Maxim Poliakovski
787ebfaff1 Implement DBDMA channel registers. 2020-03-18 17:34:03 +01:00
Maxim Poliakovski
751efb4cd6 Initial AWACS sound device emulation. 2020-03-15 20:08:53 +01:00
Maxim Poliakovski
0044610038 Add SPD SDRAM emulation. 2020-03-15 14:44:33 +01:00
Maxim Poliakovski
9c8548c238 Finish I2C bus emulation. 
This commit also cleans up and improve I2C commands
in Cuda. Also removes some related hacks.
 2020-03-15 13:28:42 +01:00
Maxim Poliakovski
753e445b4b Initial I2C bus implementation. 2020-03-14 21:38:18 +01:00
Maxim Poliakovski
75f0e09f5a viacuda: cleanup print messages. 2020-03-14 19:30:05 +01:00
Maxim Poliakovski
14156dd32b Introduce subdevices interface. 2020-03-14 15:39:34 +01:00
Maxim Poliakovski
d53400ebae Introduce base class HWComponent. 2020-03-14 14:26:30 +01:00
Maxim Poliakovski
94cf232b5e viacuda: add receiving of ADB packets. 2020-03-05 01:12:41 +01:00
Maxim Poliakovski
71d6966a03 viacuda: remove cuda prefix from method names. 2020-03-05 01:12:41 +01:00
dingusdev
354409812e Updating files with proper licensing header 2020-02-28 09:04:28 -07:00
dingusdev
51739520b5 Small formatting + logging fixes 2020-02-27 18:41:02 -07:00
dingusdev
eef82649f7 Modest logging system revamp 
Logging messages now go to dingusppc.log (if in realtime) or the console (if in debug)
 2020-02-26 19:51:07 -07:00
dingusdev
e3a1c3501a Another small fix 2020-02-24 19:56:02 -07:00
dingusdev
8bf902d945 Small fix 2020-02-24 19:55:33 -07:00
dingusdev
6c1dc8aaf0 Further logging work 2020-02-24 19:50:52 -07:00
dingusdev
baef838f7c Further integration with loguru 2020-02-24 07:54:29 -07:00
dingusdev
d91950e582 Further logging code. 2020-02-23 22:36:31 -07:00
dingusdev
e9a616ffeb Started working on incorporating loguru 2020-02-23 20:59:10 -07:00
Maxim Poliakovski
4e4d0370be Modularize build system. 
This way object files can be shared accross multiple executables.
 2020-02-03 14:36:37 +01:00
Maxim Poliakovski
a3601f224c Fix NVRAM->Heathrow connection. 2020-01-24 16:20:20 +01:00
Maxim Poliakovski
1a44d8e16c ViaCuda: allocate PRAM object dinamically. 2020-01-15 18:23:15 +01:00
dingusdev
3650b655d7 Proper NVRAM deletion 
And slowly preparing for a response method from the Cuda to the host
 2020-01-13 20:43:09 -07:00
dingusdev
5b8a787e9a Simplified PRAM emulation 2020-01-13 19:48:29 -07:00
dingusdev
1cff216e82 Quick Cuda PRAM implementation 2020-01-12 20:31:10 -07:00
Maxim Poliakovski
0b0c00b653 Add aligned macros for reading ints from memory. 2020-01-13 03:05:50 +01:00
Maxim Poliakovski
add0d5877c Add missing includes to fix GCC compilation. 2020-01-08 00:24:31 +01:00
Maxim Poliakovski
6dbd9f1c99 Remove superfluous asserts. 
Operator new will throw std::bad_alloc
when running out of memory.
 2020-01-07 12:46:32 +01:00
Maxim Poliakovski
c2bbdc4144 Finish NVRAM implementation. 2020-01-07 12:08:38 +01:00
dingusdev
f51e479e5c Quick fix for NVRAM 2020-01-05 10:44:50 -07:00
dingusdev
b92fe60fad Header updates + NVRAM Fix 2020-01-05 10:38:32 -07:00
dingusdev
b5074e4ce1 Started work on NVRAM 
Tried to also fix some issued with MSVC
 2020-01-05 09:52:46 -07:00
Maxim Poliakovski
241031dfe7 Move big-endian memory access to memreadwrite.h. 2020-01-03 16:08:00 +01:00
Maxim Poliakovski
14e203f528 Add missing includes. 2019-12-29 13:53:26 +01:00
Maxim Poliakovski
134eda8c12 Clean up some comments and messages. 2019-12-27 00:42:02 +01:00
dingusdev
0411a3a10f
Fixed address issues 2019-10-15 21:48:31 -07:00
dingusdev
97e87dea9e
Prevents the non-trivial array initialization error 
A touch haphazard, but this allows most compilers to interpret this array.
 2019-10-15 21:19:00 -07:00
Maxim Poliakovski
ddb303c5c0 Add Machine ID register for the Gossamer architecture. 2019-10-14 17:43:39 +02:00
Maxim Poliakovski
198b918a3c MPC106: allocate RAM after software setup. 
Software will setup MPC106 internal registers and
finally set MCCR1[MEMGO] flag. This is the right time
for initializing physical RAM.
 2019-10-07 03:21:13 +02:00