Commit Graph

338 Commits

Author SHA1 Message Date
Maxim Poliakovski
a5fb124e69 pdmonboard: switch to mmu_map_dma_mem. 2023-10-02 15:00:12 +02:00
Maxim Poliakovski
8cf290c034 ppcmmu: add mmu_map_dma_mem method. 2023-10-02 02:20:42 +02:00
joevt
67146028bf ppcmmu: Add 64-bit accesses to I/O.
Also add an exception for unaligned 64 bit. 64 bit accesses require dword alignment.
2023-09-30 00:29:01 +02:00
joevt
acdb14a10a Recalculate execution block after RFI.
While booting Mac OS X 10.2 installer CD, a return from RFI didn't change the instruction address virtual memory page but did change the physical memory page so we must always recalculate the physical address after RFI.
Perhaps there are other cases where this may be required?
2023-09-26 00:13:11 +02:00
joevt
dcd4384d46 Fix eb_end calculation.
- Subtract one so that it can't overflow to zero.
- Use page_start as the base so mask operation is not required.
- Recalculate it only when the page changes.
2023-09-26 00:04:07 +02:00
joevt
8348370142 Add separate flags for instruction and data TLBs.
The same flag was being used for flushing both instruction and data TLBs so sometimes a flush for one TLB list would not occur if the flag was cleared when flushing the other TLB list.
2023-09-25 23:42:32 +02:00
joevt
6b3cdad877 ppcmmu: Fix BAT update.
Need to schedule flush of both BAT and PAT type TLBs because BAT takes precedence over PAT which means updating a BAT can invalidate a PAT.
2023-09-25 23:27:00 +02:00
joevt
6b40caf63a ppcmmu: fix setting of LRU bits. 2023-09-25 23:17:57 +02:00
Maxim Poliakovski
6cfde29f00 heathrow: implement native interrupt mode. 2023-09-25 12:22:17 +02:00
Maxim Poliakovski
278799795c Disable decrementer exceptions for MPC601. 2023-09-18 21:20:59 +02:00
Maxim Poliakovski
c47cbb354d Add is_601 flag for selecting MPC601 specific behavior. 2023-09-18 21:20:59 +02:00
Maxim Poliakovski
8ff2125312 Revert "Minor checks for Data Cache opcodes and LMW"
This reverts commit fd6327ab62.
2023-09-18 21:20:59 +02:00
Maxim Poliakovski
a69763c6de dbdma: noop incomplete LOAD_QUAD & STORE_QUAD. 2023-09-18 20:20:25 +02:00
dingusdev
5e32b599d6 Merge branch 'master' of https://github.com/dingusdev/dingusppc 2023-09-04 07:22:27 -07:00
dingusdev
fd6327ab62 Minor checks for Data Cache opcodes and LMW 2023-09-04 07:21:00 -07:00
Maxim Poliakovski
45528bfc6d ppcmmu: fix flushing of the secondary ITLB. 2023-08-22 23:36:48 +02:00
Maxim Poliakovski
932f2bbceb ppcopcodes: fix stwcx. emulation. 2023-08-21 04:50:02 +02:00
dingusdev
a7ef177164 Preliminary DBDMA expansion 2023-08-13 16:38:15 -07:00
joevt
300965ab10 Decrementer exception changes. 2023-08-10 00:46:04 +02:00
Maxim Poliakovski
d2e7c9a5df ppcexceptions: fix next address for decrementer exceptions. 2023-08-09 12:53:48 +02:00
Maxim Poliakovski
de1f0c8a9b ppc_mmu: rename reg_desc to rgn_desc to improve readability. 2023-08-07 13:56:49 +02:00
Maxim Poliakovski
52a64168d7 Clean up previous merge. 2023-08-07 13:45:26 +02:00
Maxim Poliakovski
b571ff8412 Revert "ppcmmu: Add 64-bit accesses to I/O"
This reverts commit 16123dea45.
2023-08-07 13:06:11 +02:00
joevt
ac64f9e30d ppcmmu: Fix mmio read/write offset calculation.
For TLBs referencing an mmio region, calculate an offset that will translate a guest virtual address to an offset in the mmio region.
2023-08-04 20:16:13 -07:00
joevt
16123dea45 ppcmmu: Add 64-bit accesses to I/O
Also add an exception for unaligned 64 bit. 64 bit accesses require dword alignment.
2023-08-04 20:16:13 -07:00
joevt
814260f0b6 ppcmmu: Reduce unmapped physical memory logging.
Don't log consecutive accesses to unmapped physical memory addresses. This saves a couple hundred thousand lines in the log in some cases.
This is only a partial fix. Any access that isn't logged should be queued and output if a log message is output that is not this log message or after a time period.
2023-08-04 20:16:13 -07:00
Maxim Poliakovski
25150268cd ppcexceptions: fix ISI exception target address. 2023-07-10 14:06:20 +02:00
dingusdev
4364c89fd4 Slight clean-up for execution type 2023-06-19 22:36:27 -07:00
Maxim Poliakovski
73d0356058 ppcopcodes: fix dcbz for BlockZero in Mac OS 8.x 2023-06-17 20:57:48 +02:00
Maxim Poliakovski
03595c3940 Merge remote-tracking branch 'origin/machine-yosemite' 2023-04-21 12:49:58 +02:00
Maxim Poliakovski
cf0d361918 Merge 'hard-disks' branch. 2023-04-17 01:20:38 +02:00
Maxim Poliakovski
597c077b19 Implement PPC decrementer. 2023-02-15 02:36:40 +01:00
Maxim Poliakovski
9fcf5ba51a ppcmmu: fix bug in mmu_change_mode(). 2023-02-15 02:18:31 +01:00
joevt
19adb54cd8 Fix compiler warnings.
These were detected by github Actions but not by Xcode.
2023-01-11 01:17:13 -08:00
joevt
5294a8b71c Fix compiler warnings: unused variables. 2023-01-11 01:17:12 -08:00
joevt
46bc8567e9 Fix compiler warnings: uninitialized variables.
- mpc601_block_address_translation will now return 0 for prot and pa when bat_hit is false (when the if statement is not positive during the for loop). The calling function doesn't care what prot and pa are when bat_hit is false, but we do this to remove the compiler warining.
- For tlb_flush_entry, the compiler thinks m might not always be in the range 0 to 5 so tlb1 and tlb2 might not get initialized by the switch statement. Add default to get around this warning.
2023-01-11 01:17:12 -08:00
joevt
64fec88436 Fix compiler warnings: cast loses precision.
Use explicit cast when converting large integer types to smaller integer types when it is known that the most significant bytes are not required.
For pcidevice, check the ROM file size before casting to int. We'll allow expansion ROM sizes up to 4MB but usually they are 64K, sometimes 128K, rarely 256K.
for machinefactory, change the type to size_t so that it can correctly get the size of files that are larger than 4GB; it already checks the file size is 4MB before we need to cast to uint32_t.
For floppyimg, check the image size before casting to int. For raw images, only allow files up to 2MB. For DiskCopy42 images, it already checks the file size, so do the cast after that.
2023-01-11 01:17:12 -08:00
Maxim Poliakovski
7ba8921649 ppcemu: add PVR for 603ev. 2022-12-23 17:19:46 +01:00
Maxim Poliakovski
648dfcd47b ppcmmu: fix BAT state updates. 2022-12-20 14:58:45 +01:00
Maxim Poliakovski
9f4c248e4c Rework DBDMA logic for bidirectional channels. 2022-11-17 18:03:18 +01:00
dingusdev
a58ce8aeb3 Slight tweak to lscbx 2022-11-15 08:01:57 -07:00
dingusdev
8f99510af0 Fixed lscbx 2022-11-15 07:40:37 -07:00
dingusdev
647ae456e5 Slight typo squash for lscbx 2022-11-12 20:18:33 -07:00
dingusdev
1b7ff084ab Cleaned lscbx 2022-11-12 20:17:04 -07:00
dingusdev
1ed6e25d1b Removed redundant variable
Slight clean-up for lswi and lswx
2022-11-12 20:16:29 -07:00
joevt
6f0d3b48ba Fix TBR range
Fixed an issue where TBR doesn't have full 64-bit range. The original calculation was 64 bit and ended with a ÷ 10^9. This means the max for the upper 32 bits is 2^32/10^9 = 4. The solution is to use a multiplication method that supports a 96 bit product. core/mathutils.h contains functions for that. TBR driving frequency is assumed to be less than 1 GHz. Some minor modification is required for future > 1 GHz support.
2022-09-15 21:22:37 -07:00
joevt
b665f2cb4e Fix RTC units
Fixed an issue where get-msecs-601 and get-msecs-60x were not returning the same value. RTC was being calculated using timebase frequency instead of nanosecond frequency. 601 uses RTC. 60x uses TBR. On a real Mac, a G3 CPU won't have a RTC and accessing RTC would cause an exception. This is not the case for dingusppc but I don't think that's a problem.
2022-09-15 21:05:08 -07:00
joevt
ed424ad544 Fix setting RTC
Fixed an issue where setting RTC upper or lower doesn't adjust the other (since the current time has changed since the last timestamp).
2022-09-15 20:59:56 -07:00
joevt
50dbd5eccd Fix RTC not always updating
Fixed an issue where RTC was not being updated if only the upper 32 bits (seconds) was read.
Also simplified things by always updating the timestamp instead of only when the seconds changes.
2022-09-15 20:54:22 -07:00
joevt
01d7d6bac3 Make accessing RTC or TBR not affect the other
Fixed an issue where the following would cause inconsistent results (tb in the left column would sometimes decrement instead of always incrementing):
2 0 do 2 0 do cr tb@ 8 u.r ." ." 8 u.r loop 2 0 do cr 12 spaces rtc@ 8 u.r ." ." 8 u.r loop 2 0 do cr tb@ 8 u.r ." ." 8 u.r space rtc@ 8 u.r ." ." 8 u.r loop loop

RTC and TBR could not be used simultaneously because they are both incremented by an amount based on the last time stamp but that time stamp can be changed by accessing either RTC or TBR. The solution is to have a different time stamp for each.
2022-09-15 20:21:54 -07:00