Macintosh-Tools/dingusppc
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Author SHA1 Message Date
joevt
a6ba9a0554 memaccess: Add addr type cast. 2024-04-09 21:19:04 -07:00
dingusdev
9c95bc17fe Implement VX and FEX updates for mtfsfi 2024-04-09 21:11:09 -07:00
dingusdev
2c94cfee03 Removing currently unneeded functions 2024-04-09 18:34:36 -07:00
joevt
3c16870f86 ppcmmu: Replace defines. 
They may interfere with system headers.
 2024-04-09 07:57:48 -07:00
dingusdev
22f45902ca
Merge pull request #89 from sdkmap/master 
Enhanced GitHub Actions Workflow for DingusPPC Build Automation
 2024-04-09 06:58:36 -07:00
sdkmap
28b1eb8524
CI 
one commit.
 2024-04-09 12:56:06 +03:00
Maxim Poliakovski
1c8702d67a Add missing credits. 2024-04-09 01:51:51 +02:00
Mihai Parparita
cf4913deb0 bandit: Fix regression in non-Aspen PCI bridge 
Refactor from e7da98b6bd accidentally
made the non-Aspen PCI code path for CONFIG_ADDR writes by a no-op.
 2024-04-08 15:41:19 -05:00
Maxim Poliakovski
bdd441b1b6 Add machinepippin.cpp to /machines. 2024-04-08 00:56:00 +02:00
Maxim Poliakovski
4c9fe06229 Implement Aspen memory controller. 2024-04-08 00:44:24 +02:00
Maxim Poliakovski
e7da98b6bd bandit: implement Aspen style PCI bridge. 2024-04-08 00:44:24 +02:00
Maxim Poliakovski
dcdfaabedf dbdma: skip transfer commands with reqCount=0. 2024-04-07 20:39:24 +02:00
Maxim Poliakovski
524daa45a5 ppcexec.cpp: fix compilation with Apple Clang 10. 2024-04-07 20:39:24 +02:00
Maxim Poliakovski
073b8fd981 atimach64defs: add ATI_DP_CHAIN_MSK register definition. 2024-04-07 18:48:52 +02:00
Maxim Poliakovski
d7749e0a2c awacs: small cosmetic improvements. 2024-04-07 18:48:52 +02:00
Maxim Poliakovski
7972a0f2a8 hammerhead: use instance name in logging messages. 2024-04-07 18:48:52 +02:00
Maxim Poliakovski
19dcb43658 pcibase.h: remove superfluous spaces. 2024-04-07 18:48:52 +02:00
joevt
9ed1a118e6 ppcmmu: Check sizeof(T) explicitly. 
I don't know if the compiler is smart enough to figure out that ((guest_va & 0xFFF) + sizeof(T)) > 0x1000) is always false when sizeof(T) == 1 so we'll add a check for sizeof(T) > 1.
 2024-04-07 08:59:05 -07:00
dingusdev
a5a5410515 Continued fixing floating-point ops 2024-04-07 08:58:38 -07:00
dingusdev
40a4ca31b9 More minor floating-point clean-up 2024-04-07 07:23:30 -07:00
dingusdev
7f44ab2262 Minor fixes to floating point 2024-04-06 17:31:03 -07:00
dingusdev
123c927b1a Another refactor for floating points 
FCMPO and FCMPU passes the tests now*
 2024-04-06 11:02:03 -07:00
joevt
74274f164d G3 CPU upgrade property. 2024-04-04 19:05:59 -07:00
joevt
5c2bd0b3bb machines: Don't override existing properties. 2024-04-04 19:04:33 -07:00
joevt
d0a5a1e7be Add ability to override built-in GPU. 2024-04-04 19:04:06 -07:00
joevt
077e6ebae5 machineid: Don't decode board register address. 
All addresses return the same value. Converted for Board Register 1 and Board Register 66.
 2024-04-03 19:53:03 -07:00
joevt
abe0c14301 scsibus: push_data of zero bytes is ok. 
It just means the data hasn't been put on the fifo yet.
 2024-04-03 19:51:50 -07:00
joevt
61576d4032 sc53c94: Check drq_cb. 2024-04-03 19:35:58 -07:00
joevt
782a8d2c3c sc53c94: CMD_COMPLETE_STEPS includes INTSTAT_SO. 
Last step of CMD_COMPLETE_STEPS includes INTSTAT_SO to indicate to CurioSCSIController::fsmCompleting that it returned both a status byte and a message byte in the FIFO.
 2024-04-03 19:35:27 -07:00
joevt
e619dd2493 sc53c94: CMD_COMPLETE and XFER_END goes to IDLE. 
CMD_COMPLETE and XFER_END goes to the IDLE sequence state so that reentry doesn't cause a second interrupt.
 2024-04-03 19:35:13 -07:00
joevt
8a1055ed1b sc53c94: Add DBDMA support. 
- For pdm/amic, real_dma_xfer is called when SCSI_DMA_Ctrl has the run bit set.
- For tnt/grandcentral, dma_wait is called when the DBDMA is started (run bit is set). It will call real_dma_xfer when the phase and sequence are DATA_IN/RCV_DATA or DATA_OUT/SEND_DATA.
- dma_wait and real_dma_xfer uses a one shot timer instead of a loop to continue doing DMA while also giving time to the CPU. This and the above changes handles the case where the DBDMA is started before setting up the transfer phase and sequence.
- dma_stop will stop the one shot timer when the DBDMA channel is stopped.
 2024-04-03 19:19:42 -07:00
joevt
ff766b10eb sc53c94: Add seq_id to sequence descriptor. 
The seq_id can be used for logging the current command and step number.
 2024-04-03 18:43:46 -07:00
joevt
ceb2276098 sc53c94: Move chip_id to xfer_count. 
Method for reading chip_id needs verification.
 2024-04-03 18:43:40 -07:00
joevt
82f4d05f4b sc53c94: Set timer_id to zero. 
If a timer is not in progress then set its timer_id to zero. Also, don't start a newer timer if an existing one is still in progress.
 2024-04-03 18:36:53 -07:00
joevt
8a81cb4f9c sc53c94: Use enums. 2024-04-03 18:12:00 -07:00
joevt
1504bd2227 sc53c94: Move DATA_FIFO_MAX from header. 
Headers shouldn't make defines that are not meant to be used outside the source file.
 2024-04-03 18:11:07 -07:00
dingusdev
475f894582 Comment out log message 2024-04-02 19:21:56 -07:00
joevt
7007e002e6 macio: Make interrupt flags atomic. 
So they can be modified by other threads.
 2024-04-02 19:05:57 -07:00
joevt
9af1b1a720 control: Narrow the scope of local variable. 2024-04-01 22:12:20 -07:00
joevt
ca9657baf1 control: Update little-endian error message. 2024-04-01 22:12:05 -07:00
joevt
3e347746f9 control: Don't abort when setting little endian. 
If this gets set accidentally, (such as while playing in Open Firmware), allow the user to change it back.
 2024-04-01 22:11:35 -07:00
joevt
b5987afaa6 control: Implement BAR update. 2024-04-01 22:11:30 -07:00
joevt
ea46d08835 appleramdac: Allow read from CLUT part 2. 2024-04-01 21:47:59 -07:00
joevt
789114cc7d control: Save CNT_TST and MON_SENSE. 
These are writable registers that should return what was written to them.
 2024-04-01 21:34:26 -07:00
joevt
cf292fafcb control: vram changes. 
Allow VRAM presence only in optional bank.

control: Implement banks.

The BAR is 64MB.
The little-endian/big-endian ranges repeat every 16MB.
An endian range can be addressed in d128 (wide) mode or d64 mode.
In d128 mode, there is a 4MB range followed by an undefined 4MB range. bytes 0..7 belong to the standard bank and bytes 8..15 belong to the optional bank.
In d64 mode:
- 2MB mirror ranges at 0MB and 2MB (both have the same read/write behavor: write to both banks or read from the standard bank.
- 2MB standard bank rage at 4MB.
- 2MB optional bank range at 6MB.
 2024-04-01 21:17:17 -07:00
joevt
08fca7de69 control: Recalc framebuffer after each change. 2024-04-01 20:58:46 -07:00
joevt
b42437c458 control: Mask unmodifiable bits. 2024-04-01 19:01:03 -07:00
joevt
98e1787f93 machines: Remove duplicate gfxmem_size properties. 2024-04-01 18:28:13 -07:00
joevt
7a0ec0ecd3 README: Grammar. 2024-04-01 18:23:39 -07:00
dingusdev
55b9f8bbe5 bzero -> memset 2024-04-01 08:03:12 -07:00