This method is used by both pci_io_read and pci_io_write to determine if ISA type I/O access is allowed.
The SPARSE_IO_BASE I/O address is defined. This I/O range is not defined by an I/O BAR.
- Add IOBusDevice (nvram_addr_hi_dev) for NVRAM addr hi.
- Add IOBusDevice (nvram_dev) for NVRAM data.
- Make all IOBusDevices use the same code.
- Log error if 4 least significant bits of offset are not zero.
- Correctly byte swap the value before passing it to the IOBusDevice.
- When reading, duplicate the bytes in a word or dword like a real Power Mac does.
Grackle allows attaching different PCI devices. This change allows attach multiple of the same PCI device. To make the name unique in the machine map, the name of the PCI slot is appended to the device name.
There are cases where when it's necessary (e.g. given uninitialized NVRAM,
the Beige G3 with the 10.2 install CD inserted will update the boot
device and restart to boot from it).
Restart support was done by wrapping the ppc_exec function in a loop and
checking for a restart power off reason. We also need to disconnect all
event listeners, since they will be recreated when the machine is
re-initialized.
PDM defaults to 640x480.
If you set --mon_id to MacRGB12in then it would draw 512x384 inside a 640x480 window.
If you set --mon_id to Multiscan20in then it would try to draw 832x624 inside a 640x480 window and crash.
If you set the Monitors control panel to switch multiscan display from 640x480 to 832x624 and restart then it would crash.
Now it will correctly change the window size every time the mode changes.
- Add all the interrupts including DMA.
- Modify the Interrupt to IRQ_ID translation so the interrupts belonging to the first set of 32 interrupts don't need to be shifted.
Add pixel format and pixel clock to the list of fields that will initiate a recalculation.
If frame rate is less than 24 or greater than 120 then assume 60Hz.
Consider write-only bits: ATI_CLOCK_STROBE can't be read so clear it.
8 bits at Offset 2 is PLL_DATA. If we don't modify PLL_DATA, then insert the current value of PLL_DATA into the value that will be read from ATI_CLOCK_CNTL.
When checking if a particular byte of a register is accessed, check both the starting position (offset) and ending position (offset + size) of the bytes being access.
- Add BAR 2 decode. This BAR isn't actually used by Mac OS X, but decode it anyway just in case.
- Support updating of BARs (using change_one_bar method).
pixel_format is different than pixel_depth.
pixel_format depends on the GPU. A GPU might have multiple formats for the same depth.
We store this in videoctrl so that we can detect changes in pixel_format like we do for pixel_depth and active_width and active_height.
When fetching DMA command, make sure to convert little endian fields to host endianness (i.e. don't use memcpy).
When fetching DMA command, return the host address of the DMA command for LOAD_QUAD. Maybe this address should be cached whenever this->cmdptr changes?
When fetching DMA command, return whether the DMA command is writable.
For LOAD_QUAD, pass the address of the DMA command to xfer_quad.
Always log unexpected DMA command values.
Write full 32-bit value for LOAD_QUAD.
Write reqCount to resCount.
pci_conv_rd_data can be used to handle unaligned or 64-bit accesses in mmio regions if it's modified to include the next 32-bit value.
For pci config accesses, grackle repeats the 32-bit value. bandit uses a seemingly random number for the next 32-bit value, but we'll make it work like grackle.
PCCard is used by PowerBook G3 Wallstreet in Open Firmware 2.0.1.
CardBus is probed in New World Macs starting from at least Open Firmware 4.1.9f1 sometime after Open Firmware 3.1.1.
- Create PCIBase from common stuff in PCIDevice.
- Add PCIBridgeBase. These have a primary bus number, secondary bus number, and subordinate bus number which are used to determine if PCI type 1 config cycle should be passed.
- Change PCIBridge to use PCIBridgeBase instead of PCIDevice.
- Add PCICardBusBridge which uses PCIBridgeBase.
For example, Old World Macs have versions of Open Firmware that don't support 512 MB BARs correctly. They may attempt to set such a BAR to 0x90000000 (a 256 MB boundary) instead of 0xA0000000 (the next available 512 MB boundary).
So that you don't see identical messages "Could not restore NVRAM content from the given file."
Instead, one will mention nvram.bin and the other will mention pram.bin.
