Commit Graph

870 Commits

Author SHA1 Message Date
joevt
b61a7c4aea Log something from machine initialization.
The machine type and its corresponding source file name should appear once in the log output.
2023-01-11 01:17:12 -08:00
joevt
2f08a0b327 Fix Gossamer machineID allocation size.
When the allocation is logged, it will look appear like this:
Added mmio region 0xFF000004..0xFF000FFF (Machine-id)
instead of like this:
Added mmio region 0xFF000004..0xFF001003 (Machine-id)
2023-01-11 00:05:23 -08:00
joevt
52fa30b71d Add ability to unregister mmio region.
mmio regions are registered when a PCI BAR is set. Add the ability to reverse that - for when a PCI BAR is changed.
2023-01-11 00:05:23 -08:00
joevt
911acb4bc2 Remove MPC106 RAM allocation failed error.
It might not be an error - usually it just means that it was already allocated so demote this message to a warning.

Related memory allocation changes:
- Added find_range_exact which searches for an allocation that exactly matches a range.
- Added find_range_contains which searches for an allocation that is completely contained within a range.
- Added find_range_overlaps which searches for an allocation that overlaps any part of a range.
- Added is_range_free which is similar to the above three. It returns false if any allocated range overlaps a range. It reports the regions that it overlaps.
- Fix add_mem_region and add_memio_region so that they don't just check the first byte and last byte.
- Memory allocation logging should include the range (first byte..last byte) and device if possible.
- Log memory allocations.
2023-01-11 00:05:23 -08:00
joevt
0bd9d0e973 Fix HWComponent name initialization.
First, remove name override for subclasses of HWComponent (Chaos and ScsiBus) because HWComponent has its own name field.

HWComponent name should be set as early as possible in the constructor so it can be used in log messages.
PCIDevice should set name of HWComponent (through MMIODevice) in its constructor, using the name that is given to its constructor.
For Bandit and Grackle, they don't need to set the HWComponent name since its PCIDevice constructor will now do it.
Chaos is not a PCIDevice so it should set the MMIODevice name itself.
Why does PCIDevice have a name that is separate from the HWComponent name?
2023-01-11 00:05:23 -08:00
joevt
5aaae40d94 Add Nvidia vendor ID.
In case you want to emulate an Nvidia GPU in the future (for Core Image, etc.)
2023-01-11 00:05:23 -08:00
joevt
190718fbee Add BAR 0 to control.
BAR 0 exists on a real Power Mac 8600 and the dingusppc 7500.

On a Power Mac 8600, the initial value is 0x84000003. In Open Firmware, you can write to all bits of the BAR and read the value back except the 2 least significant bits are always %11. Bit 0 indicates I/O space. Bit 1 is reserved and should be zero so maybe this is not a real I/O space BAR. 0x8400000 is written to the BAR by Open Firmware. It doesn't look like a normal I/O address which are usually 16 bits.

On the emulated 7500, 0x02000000 is written to the BAR by Open Firmware sometime during probe-all. The BAR did not behave as it does in the Power Mac 8600. This commit fixes that.

Two questions remain:
1) Which fcode writes to the BAR? Is it the probe fcode or is it the control fcode? There's no config-_! in the control fcode.
2) What is the purpose of the BAR? Writing to it can cause a hang. The testbits code below seems to succeed - it restores the original value after reading the result of testing each bit and before displaying the result. The values shown for the MSB (0x84 on the 8600 and 0x02 on the 7500) could be three flag bits.

```
dev vci0
: testbits { adr ; org }
	cr
	adr config-l@ dup -> org ." original : " 8 u.r cr
	20 0 do
		1 1f i - << dup 8 u.r ."  : "
		adr config-l!
		adr config-l@
		org adr config-l!
		8 u.r cr
	loop
	;

15810 testbits \ 15810 is the address of the BAR on the emulated 7500.
```
2023-01-11 00:05:23 -08:00
joevt
37c352955c Allow bit 1 of I/O BARs to be set.
Usually bit 1 of I/O BARs is 0 since it is reserved, but control has an I/O BAR where this bit is set.
bar_cfg is used to determine the default values of the least significant bits (2 bits for I/O BARs and 4 bits for Memory BARs).
The upper bits of bar_cfg determine which bits can be set and also determines the size of the BAR.
2023-01-11 00:05:23 -08:00
joevt
fb56a6b536 Fix gazelle sys-id.
It should match AAPL,cpu-id property from real Power Mac 6500.
2023-01-11 00:05:23 -08:00
Maxim Poliakovski
74b457819a Update .gitignore 2023-01-09 00:40:48 +01:00
Maxim Poliakovski
0118b347f3 Clean up build scripts. 2023-01-08 23:29:25 +01:00
Maxim Poliakovski
101a8d33b0 Manage Windows build dependencies with vcpkg. 2023-01-08 22:27:13 +01:00
Maxim Poliakovski
eb3f978c7b Update Capstone and fix its compilation. 2022-12-30 22:31:51 +01:00
Maxim Poliakovski
9ea4a465f4 machinegazelle: tiny comment improvement. 2022-12-23 23:45:26 +01:00
Maxim Poliakovski
41a34ffab6 Basic Gazelle (PM 6500) emulation. 2022-12-23 17:19:46 +01:00
Maxim Poliakovski
8002737124 Basic O'Hare I/O controller emulation. 2022-12-23 17:19:46 +01:00
Maxim Poliakovski
7ba8921649 ppcemu: add PVR for 603ev. 2022-12-23 17:19:46 +01:00
Maxim Poliakovski
a1d9fcfa9d Basic PSX memory controller emulation. 2022-12-23 17:19:46 +01:00
Maxim Poliakovski
648dfcd47b ppcmmu: fix BAT state updates. 2022-12-20 14:58:45 +01:00
Maxim Poliakovski
f6e208267e bandit: more config space registers. 2022-12-19 01:28:16 +01:00
Maxim Poliakovski
24ccdabedc bandit: add PSX style PCI bridge. 2022-12-18 23:40:56 +01:00
Maxim Poliakovski
78528a1a16 floppyimg: correct format for MFM DC42 images. 2022-12-12 02:27:42 +01:00
Maxim Poliakovski
df02f5053b floppyimg: initial support for Disk Copy 4.2 images. 2022-12-11 23:00:52 +01:00
Maxim Poliakovski
14bcb6c08a Clean up previous commit. 2022-11-23 20:28:09 +01:00
joevt
09d374f626 Log PCI config write values MSB first
Writes to config registers of invalid or non-existent PCI devices are logged. They should be logged with most significant byte first.
The values enter the methods in reverse byte order so they need to be byte swapped (except when size is 1) for logging.
The result is that this command in Open Firmware:
`12345678 16800 config-l!`
will log this:
`VCI0 err: write attempt to non-existing VCI device ??:0d.0 @00.l = 12345678`
2022-11-23 19:55:05 +01:00
joevt
072d5ae330 Fix Expansion ROM BAR writes
The bits that can be set are the enable bit (bit 0) plus the bits represented by exp_bar_cfg which is determined by the size of the ROM which is calculated to be a power of 2 and a minimum of 2K.
2022-11-23 12:25:28 +01:00
Maxim Poliakovski
3b0e2c677d dbdma: disable two logging messages. 2022-11-18 18:07:32 +01:00
Maxim Poliakovski
4f05d3dae6 swim3: implement reading the Step register. 2022-11-18 18:06:46 +01:00
Maxim Poliakovski
d96351763f swim3: emulate on-chip 1 us timer. 2022-11-17 18:03:18 +01:00
Maxim Poliakovski
a0dd1884b3 macio: properly wire floppy DMA. 2022-11-17 18:03:18 +01:00
Maxim Poliakovski
a4ff58e9ee New floppy access logic with improved timing. 2022-11-17 18:03:18 +01:00
Maxim Poliakovski
447941abe0 machinetnt: fix default RAM allocation. 2022-11-17 18:03:18 +01:00
Maxim Poliakovski
9835b96e87 floppyimg: assume raw image by default. 2022-11-17 18:03:18 +01:00
Maxim Poliakovski
9f4c248e4c Rework DBDMA logic for bidirectional channels. 2022-11-17 18:03:18 +01:00
Maxim Poliakovski
98ccef732f TimerManager: more microseconds related constants. 2022-11-17 18:03:18 +01:00
Maxim Poliakovski
dac50fe0fb GrandCentral: fix DMA dispatching. 2022-11-17 18:03:18 +01:00
Maxim Poliakovski
76e0fab33a superdrive: implement eject disk command. 2022-11-17 18:03:18 +01:00
Maxim Poliakovski
585c5fd4ca Guess low-level floppy disk format based on image size.
Also add fdd_fmt property for manually specifying disk
format.
2022-11-17 18:03:18 +01:00
Maxim Poliakovski
de082626ab
Merge pull request #38 from joevt/master
pcidevice: fix struct offset in the expansion ROM header.
2022-10-23 21:25:08 +02:00
joevt
9f1d613a2d Fix PCI struct offset size
The Pointer to PCI Data Structure is supposed to be two bytes. It is described in the PCI Firmware Specification Revision 3.0, section 5.1.1. PCI Expansion ROM Header Format.
The pointer is two bytes at 0x18. The pointer is supposed to be a multiple of 4 which means there's always at least two bytes of padding after the pointer. Some BIOS firmware images may use the 2 bytes following the pointer for other purposes (plus additional bytes before the PCI Data Structure) so we cannot assume the bytes will be zero.
Some PCI expansion ROMs may include both BIOS and Open Firmware images.
2022-10-23 00:26:32 -07:00
Maxim Poliakovski
f27dd94945
Merge pull request #34 from joevt/master
RTC and TBR fixes
2022-09-24 16:40:37 +02:00
joevt
6f0d3b48ba Fix TBR range
Fixed an issue where TBR doesn't have full 64-bit range. The original calculation was 64 bit and ended with a ÷ 10^9. This means the max for the upper 32 bits is 2^32/10^9 = 4. The solution is to use a multiplication method that supports a 96 bit product. core/mathutils.h contains functions for that. TBR driving frequency is assumed to be less than 1 GHz. Some minor modification is required for future > 1 GHz support.
2022-09-15 21:22:37 -07:00
joevt
b665f2cb4e Fix RTC units
Fixed an issue where get-msecs-601 and get-msecs-60x were not returning the same value. RTC was being calculated using timebase frequency instead of nanosecond frequency. 601 uses RTC. 60x uses TBR. On a real Mac, a G3 CPU won't have a RTC and accessing RTC would cause an exception. This is not the case for dingusppc but I don't think that's a problem.
2022-09-15 21:05:08 -07:00
joevt
ed424ad544 Fix setting RTC
Fixed an issue where setting RTC upper or lower doesn't adjust the other (since the current time has changed since the last timestamp).
2022-09-15 20:59:56 -07:00
joevt
50dbd5eccd Fix RTC not always updating
Fixed an issue where RTC was not being updated if only the upper 32 bits (seconds) was read.
Also simplified things by always updating the timestamp instead of only when the seconds changes.
2022-09-15 20:54:22 -07:00
joevt
01d7d6bac3 Make accessing RTC or TBR not affect the other
Fixed an issue where the following would cause inconsistent results (tb in the left column would sometimes decrement instead of always incrementing):
2 0 do 2 0 do cr tb@ 8 u.r ." ." 8 u.r loop 2 0 do cr 12 spaces rtc@ 8 u.r ." ." 8 u.r loop 2 0 do cr tb@ 8 u.r ." ." 8 u.r space rtc@ 8 u.r ." ." 8 u.r loop loop

RTC and TBR could not be used simultaneously because they are both incremented by an amount based on the last time stamp but that time stamp can be changed by accessing either RTC or TBR. The solution is to have a different time stamp for each.
2022-09-15 20:21:54 -07:00
joevt
ce925f5e56 Fix RTC upper
Fixed a typo that caused rtc@ to always return 0 for the upper 32 bits (represents seconds).
The problem could cause the following to hang on Power Mac 7500:
cr 2000 0 do get-msecs u. 1 ms loop
2022-09-15 19:34:46 -07:00
Maxim Poliakovski
a7403195ba
Merge pull request #33 from dingusdev/revert-32-master
Revert "PCI fixes"
2022-09-03 01:27:56 +02:00
Maxim Poliakovski
3a5c61797c
Revert "PCI fixes" 2022-09-02 23:24:06 +00:00
dingusdev
467e4df7dc
Merge pull request #32 from joevt/master
PCI fixes
2022-09-02 07:42:01 -07:00