Macintosh-Tools/dingusppc
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Author SHA1 Message Date
joevt
e872f08273 scsicdrom: Include invalid field info. 
For CHECK_CONDITION status from READ_CAPACITY_10 and READ_TOC.
 2024-03-30 11:00:01 -07:00
joevt
a6fda3b787 scsicdrom: Handle MODE_SENSE_6 unsupported page. 
Return CHECK_CONDITION status instead of abort. To Do: apply change to scshhd.
 2024-03-30 10:59:43 -07:00
joevt
a48851888f scsihd: Setup data_ptr for STATUS and MESSAGE_IN. 
bytes_out is used instead of the removed cur_buf_cnt.
data_ptr is setup by prepare_data instead of process_command.
Not sure why scsicdrom doesn't set bytes_out in prepare_data.
 2024-03-30 08:37:10 -07:00
joevt
f1abb66f9a atahd: Add STANDBY_IMMEDIATE. 2024-03-30 08:30:37 -07:00
joevt
c999c51d77 scsicdrom, scsihd: Check lun. 
READ_CAPACITY_10, READ_6, and READ_10 now checks LUN that is included in CDB and returns a CHECK_CONDITION if it doesn't match.
 2024-03-29 19:12:06 -07:00
joevt
6bb5227ee1 scsihd: Abort if RelAdr bit of READ_10. 
Like scsicdrom does.
 2024-03-29 19:01:42 -07:00
joevt
cefe8698da scsihd: Add PREVENT_ALLOW_MEDIUM_REMOVAL. 
Like scsicdrom has.
 2024-03-29 19:01:32 -07:00
joevt
4be6bad526 scsicdrom: Fix compiler warning. 2024-03-29 19:00:38 -07:00
joevt
d3c913e384 scsicdrom: Cleanup. 
- Use macros for reading 2 byte or 4 byte big endian data. block_size is assumed to be < 64K so WRITE_DWORD_BE_A will write two leading zeros.
- Scalar pass by value parameters don't need to be const.
- Remove some unnecessary locals.
 2024-03-29 18:53:13 -07:00
joevt
a868f4eee4 scsihd: Cleanup. 
Use this qualifier.
Use macros for reading 2 byte or 4 byte big endian data.
 2024-03-29 18:53:04 -07:00
joevt
44da89979f scsihd: Use device name in abort message. 2024-03-29 18:52:52 -07:00
joevt
a79f07e4dc scsicdrom: Move mode_select_6. 
Make it a separate method like scsihd. It also checks the incoming param size. If it's zero then the phase is not switched. Is that wrong? Still probably unfinished.
 2024-03-29 18:52:30 -07:00
Maxim Poliakovski
e17a96f5ec atirage: break long lines. 2024-03-29 21:21:58 +01:00
joevt
5062508940 scsicdrom: Rename mode_sense_6. 
To match scsihd.
 2024-03-29 07:56:48 -07:00
joevt
9cf91328c1 scsicdrom: Move inquiry info to class fields. 
Like scsihd.
 2024-03-29 07:56:44 -07:00
joevt
6a30ef7017 scsicdrom: Fields inited by parent class. 
They don't need to be reinitialized.
 2024-03-29 07:56:31 -07:00
Maxim Poliakovski
71dabf5334 atahd: break long lines. 2024-03-29 12:46:57 +01:00
joevt
155b8cdad9 atahd: Support inexact CHS. 
The total size needs to have 3 factors cylinders, heads, & sectors. Imagine a disk having a total size with 3 prime factors 3 x 5 x 11. 15 cannot be assigned to heads because that would only leave 11 for sectors and cylinders. Therefore, test all heads and sectors combinations. If the third factor for cylinders is not found, then choose 16 heads, then the minimum number of sectors, and finally the maximum number of cylinders. The loop could be changed to skip values of heads that are not a factor, but it doesn't take any time to try them all.
 2024-03-28 21:07:12 -07:00
joevt
96dc02b249 atahd: Make sure disk is not too big. 2024-03-28 21:07:08 -07:00
Maxim Poliakovski
eaddcab0ba atahd: don't register device for empty images. 
Workaround for the case when no hard disk image
was specified. The device instance is still there
but it won't be visible by the guest OS.
 2024-03-29 03:54:09 +01:00
joevt
d9b02ecd8d ppcmmu: Check 8 byte alignment spanning pages. 2024-03-28 07:53:03 -07:00
joevt
b9c12e44a4 ppcopcodes: Cleanup 3. 2024-03-28 07:36:40 -07:00
joevt
58ed5bb56e ppcexec: Opcode initialization to one function. 
Move all opcode initialization to initialize_ppc_opcode_tables.
Some opcodes are illegal for some processors.
 2024-03-28 07:35:57 -07:00
joevt
094f44e92c ppcopcodes: Make MQ read only on non-601 CPUs. 2024-03-28 07:29:50 -07:00
joevt
566706dd62 ppctests: Fix compiler warnings. 2024-03-28 07:17:38 -07:00
joevt
60a76e9348 ppcexec: Fix branch check in ppc_exec_single. 2024-03-28 07:17:13 -07:00
joevt
1d9b0f7fa5 macio: Add MIO_AUX_CTRL enum. 2024-03-28 07:10:05 -07:00
joevt
f55ad323b4 ppcdisasm: Fix order of operands. 
For cntlzw, extsh, extsb.
 2024-03-28 07:09:50 -07:00
joevt
78558e4c52 debugger: Ensure space between opcode and operand. 
Instructions that are 8 characters or longer (such as mtdbat3l) did not have a space between opcode and operand. Now there is always a space. The width of the opcode column is unchanged except for those opcodes that have 8 or more characters.
 2024-03-28 06:54:23 -07:00
joevt
c9d4cc3321 ppcmmu: Remove old and slow code. 2024-03-27 20:13:45 -07:00
joevt
0f8a464157 ppcmmu: Use MSR enums for calculating mmu_mode. 2024-03-27 18:44:59 -07:00
joevt
e4a675babb ppcmmu: Remove line feed from log messages. 2024-03-27 18:44:42 -07:00
joevt
5b4ed01bec ppcexec: Make separate enum for shift instructions. 2024-03-27 18:43:46 -07:00
joevt
64df253053 ppcexec: Rename bool function enums. 
Use "logical" since the functions deal with multiple bits instead of a single boolean value and because the 601 manual calls them Logical Instructions.
Use "ppc" for the enums because logical_and is defined elsewhere and because the original DPPC code used these names for those functions.
 2024-03-27 18:43:35 -07:00
joevt
d8129bd643 ppcexec: Add comments for macros. 2024-03-27 18:43:15 -07:00
joevt
60a4738694 Add stub for pci_unregister_device. 2024-03-27 18:23:27 -07:00
joevt
9ade14e076 memctrlbase: fix possible memory leak. 2024-03-27 14:08:20 +01:00
Maxim Poliakovski
6aa54b8dda ppcexec: break long lines, improve indentation. 2024-03-27 13:55:05 +01:00
Maxim Poliakovski
0ff911cc26 poweropcodes: cosmetic improvements. 2024-03-27 03:45:22 +01:00
Maxim Poliakovski
b5b14b2f9d ppcopcodes: cosmetic improvements. 2024-03-27 03:36:17 +01:00
Maxim Poliakovski
2b6f41e0d0 poweropcodes: use XER constants instead of magic numbers. 2024-03-27 03:36:17 +01:00
Maxim Poliakovski
9b429cc751 ppcopcodes: replace magic numbers with XER constants. 2024-03-27 03:36:17 +01:00
dingusdev
ec56dffd19 Adding missing includes 2024-03-26 19:25:05 -07:00
dingusdev
a09f2093b5 Optimize register initialization 
Courtesy of joevt, adapted to fit the C++ standard
 2024-03-26 18:52:56 -07:00
dingusdev
b15d3be88a Moving is_601 up, so the opcodes get initialized correctly 2024-03-26 18:41:16 -07:00
joevt
a26628ed50 bandit: Add delayed aack register. 2024-03-26 07:34:08 -07:00
joevt
0b5a798343 atimach64gx: Fix ATI_CRTC_GEN_CNTL. 
Add call to crtc_update.
Maybe consider AK and EN bits (placeholder for now).
 2024-03-26 07:31:49 -07:00
joevt
224ae50e91 ppcexec: Make more instructions illegal for 601. 2024-03-26 06:50:33 -07:00
joevt
03d7728d46 ppcexec: Use macros to assign subopcode functions. 2024-03-26 06:50:17 -07:00
joevt
19ba15f2f1 ppc: Separate enums for separate fields. 2024-03-26 06:44:26 -07:00