Mihai Parparita acc6e77ec5 Respect FP bit in MSR when running floating point instructions
Rather than running them normally, they should trigger a "no FPU"
exception. This appears to be required to allow correct graphical
rendering under Mac OS X - the FP bit cleared via mtmsr and rfi
instructions and something else appears to be relying on the exception
to be thrown.

Implemented by maintaining a parallel version of the OpcodeGrabber
table (OpcodeGrabberNoFPU) which contains alternate implementations
for all the floating point instructions. We switch the table whenever
the MSR value changes. This should minimize the overhead of doing
these checks.
2025-01-20 23:19:37 -08:00
..
2024-12-14 06:31:59 -07:00
2024-12-17 18:46:53 -07:00