mirror of
https://github.com/dingusdev/dingusppc.git
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206 lines
6.2 KiB
C
206 lines
6.2 KiB
C
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-24 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef PPC_MACROS_H
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#define PPC_MACROS_H
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#include <cinttypes>
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#include "ppcemu.h"
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#define reg_d(opcode) ((opcode >> 21) & 0x1F)
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#define reg_a(opcode) ((opcode >> 16) & 0x1F)
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#define reg_b(opcode) ((opcode >> 11) & 0x1F)
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#define reg_c(opcode) ((opcode >> 6) & 0x1F)
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#define reg_s(opcode) reg_d(opcode)
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#define trap_to(opcode) reg_d(opcode)
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#define simm(opcode) int32_t(int16_t(opcode))
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#define uimm(opcode) uint16_t(opcode)
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#define rot_sh(opcode) reg_b(opcode)
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#define rot_mb(opcode) ((opcode >> 6) & 0x1F)
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#define rot_me(opcode) ((opcode >> 1) & 0x1F)
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#define crf_d(opcode) ((opcode >> 21) & 0x1C)
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#define crf_s(opcode) ((opcode >> 16) & 0x1C)
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#define crm(opcode) ((opcode >> 12) & 0xFFU)
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#define fcrm(opcode) crm(opcode)
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#define fmmask(opcode) ((opcode >> 17) & 0xFFU)
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#define br_bo(opcode) reg_d(opcode)
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#define br_bi(opcode) reg_a(opcode)
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#define br_bd(opcode) int32_t(int16_t(opcode & ~3UL))
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#define adr_li(opcode) int32_t((opcode & ~3UL) << 6) >> 6
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#define adr_d(opcode) int32_t(int16_t(opcode))
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#define segreg(opcode) ((opcode >> 16) & 0xF)
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#define mtfsfi_mask(opcode) ((opcode << 16) & 0xF0000000UL)
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#define ppc_grab_twi(opcode) \
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instr.i_simm = simm(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg0 = trap_to(opcode);
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#define ppc_grab_tw(opcode) \
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instr.i_simm = simm(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg0 = trap_to(opcode); \
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#define ppc_grab_crfd(opcode) \
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instr.arg0 = crf_d(opcode);
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#define ppc_grab_mcrxr(opcode) \
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instr.arg0 = crf_d(opcode); \
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instr.arg4 = crf_d(opcode); \
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#define ppc_grab_sr(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = segreg(opcode); \
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#define ppc_grab_mtfsfi(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.mask = mtfsfi_mask(opcode); \
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#define ppc_grab_mtfsf(opcode) \
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instr.arg2 = reg_b(opcode); \
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instr.mask = fmmask(opcode);\
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#define ppc_grab_regs_dasimm(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.i_simm = simm(opcode); \
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#define ppc_grab_regs_sauimm(opcode) \
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instr.arg0 = reg_s(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.i_simm = simm(opcode); \
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#define ppc_grab_regs_da_addr(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.addr = adr_d(opcode); \
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#define ppc_grab_branch(opcode) \
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instr.addr = adr_li(opcode); \
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#define ppc_grab_branch_cond(opcode) \
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instr.arg0 = br_bo(opcode); \
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instr.arg1 = br_bi(opcode); \
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#define ppc_grab_d(opcode) \
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instr.arg0 = reg_d(opcode);
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#define ppc_grab_dab(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg2 = reg_b(opcode); \
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#define ppc_grab_regsasimm(opcode) \
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instr.arg0 = reg_s(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.i_simm = simm(opcode); \
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#define ppc_grab_regssauimm(opcode) \
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instr.arg0 = reg_s(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.i_simm = simm(opcode); \
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#define ppc_grab_crfd_regsauimm(opcode) \
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instr.arg0 = crf_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.i_simm = simm(opcode); \
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#define ppc_grab_crfd_regsab(opcode) \
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instr.arg0 = crf_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg2 = reg_b(opcode);
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#define ppc_grab_s(opcode) \
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instr.arg0 = reg_s(opcode); \
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#define ppc_grab_regs_crfds(opcode) \
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instr.arg0 = crf_d(opcode); \
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instr.arg1 = crf_s(opcode); \
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#define ppc_grab_regsdab(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg2 = reg_b(opcode); \
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#define ppc_grab_regs_sab_rot(opcode) \
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instr.arg0 = reg_s(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg2 = reg_b(opcode); \
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instr.arg3 = rot_mb(opcode); \
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instr.arg4 = rot_me(opcode); \
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#define ppc_store_iresult_reg(reg, ppc_result)\
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ppc_state.gpr[reg] = ppc_result;
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#define ppc_store_fpresult_int(reg, ppc_result64_d)\
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ppc_state.fpr[(reg)].int64_r = ppc_result64_d;
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#define ppc_store_fpresult_flt(reg, ppc_dblresult64_d)\
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ppc_state.fpr[(reg)].dbl64_r = ppc_dblresult64_d;
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#define ppc_grab_regsfpdb(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg2 = reg_b(opcode); \
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#define GET_FPR(reg) \
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ppc_state.fpr[(reg)].dbl64_r
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#define ppc_grab_regsfpdiab(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg2 = reg_b(opcode); \
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#define ppc_grab_regsfpdia(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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#define ppc_grab_regsfpsia(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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#define ppc_grab_regsfpsiab(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg2 = reg_b(opcode); \
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#define ppc_grab_regsfpsab(opcode) \
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instr.arg0 = crf_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg2 = reg_b(opcode); \
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#define ppc_grab_regsfpdab(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg2 = reg_b(opcode); \
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#define ppc_grab_regsfpdac(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg3 = reg_c(opcode); \
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#define ppc_grab_regsfpdabc(opcode) \
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instr.arg0 = reg_d(opcode); \
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instr.arg1 = reg_a(opcode); \
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instr.arg2 = reg_b(opcode); \
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instr.arg3 = reg_c(opcode); \
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#endif // PPC_MACROS_H
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