dingusppc/cpu/ppc/test/ppcdisasmtest.csv

1	# Test data for PowerPC disassembler supplied as comma-separated values
2	# Data format:
3	# instruction address (hex), instruction code (hex), expected disassembly: opcode, [operands...]
4	# (lines starting with a hash sign (#) will be treated as comments and ignored)
5	# unconditional branches
6	0xFFF03008,0x48000355,bl,0xFFF0335C
7	0xFFF03000,0x4280035C,b,0xFFF0335C
8	0xFFF03000,0x48000802,ba,0x00000800
9	0xFFF03000,0x48000803,bla,0x00000800
10	# bcctr variants with simplified mnemonics
11	0xFFF03000,0x4E800420,bctr
12	0xFFF03000,0x4E800421,bctrl
13	0xFFF03000,0x4C820420,bnectr
14	0xFFF03000,0x4C820421,bnectrl
15	0xFFF03000,0x4C960420,bnectr,cr5
16	0xFFF03000,0x4C920421,bnectrl,cr4
17	0xFFF03000,0x4D980420,bltctr,cr6
18	0xFFF03000,0x4C9D0420,blectr,cr7
19	0xFFF03000,0x4D820420,beqctr
20	0xFFF03000,0x4D960420,beqctr,cr5
21	0xFFF03000,0x4CA80420,bgectr+,cr2
22	0xFFF03000,0x4C980421,bgectrl,cr6
23	0xFFF03000,0x4D810420,bgtctr
24	0xFFF03000,0x4D850420,bgtctr,cr1
25	0xFFF03000,0x4D8B0421,bsoctrl,cr2
26	0xFFF03000,0x4C830420,bnsctr
27	0xFFF03000,0x4C930420,bnsctr,cr4
28	# bclr variants with simplified mnemonics
29	0xFFF03000,0x4E800020,blr
30	0xFFF03000,0x4E800021,blrl
31	0xFFF03000,0x4D800020,bltlr
32	0xFFF03000,0x4D840020,bltlr,cr1
33	0xFFF03000,0x4C810021,blelrl
34	0xFFF03000,0x4C8D0020,blelr,cr3
35	0xFFF03000,0x4DA20020,beqlr+
36	0xFFF03000,0x4DBE0021,beqlrl+,cr7
37	0xFFF03000,0x4CA80020,bgelr+,cr2
38	0xFFF03000,0x4DB90020,bgtlr+,cr6
39	0xFFF03000,0x4C8A0021,bnelrl,cr2
40	0xFFF03000,0x4D930020,bsolr,cr4
41	0xFFF03000,0x4C8F0021,bnslrl,cr3
42	0xFFF03000,0x4E000020,bdnzlr
43	0xFFF03000,0x4E200020,bdnzlr+
44	0xFFF03000,0x4E400020,bdzlr
45	0xFFF03000,0x4E400021,bdzlrl
46	0xFFF03000,0x4E600020,bdzlr+
47	0xFFF03000,0x4C000020,bdnzflr,lt
48	0xFFF03000,0x4C040020,bdnzflr,4*cr1+lt
49	0xFFF03000,0x4C5D0021,bdzflrl,4*cr7+gt
50	0xFFF03000,0x4D020020,bdnztlr,eq
51	0xFFF03000,0x4D530021,bdztlrl,4*cr4+so
52	# conditional branches with simplified mnemonics, primary opcode 0x10
53	0xFFF0011C,0x409E2EE4,bne,cr7,0xFFF03000
54	0xFFF00100,0x40A60098,bne+,cr1,0xFFF00198
55	0xFFF00100,0x41820018,beq,0xFFF00118
56	0xFFF03004,0x41200054,bdnzt+,lt,0xFFF03058
57	0xFFF03004,0x40000054,bdnzf,lt,0xFFF03058
58	0xFFF03000,0x4106FFF4,bdnzt,4*cr1+eq,0xFFF02FF4
59	0xFFF03000,0x4001558F,bdnzfla,gt,0x0000558C
60	# indexed load/store instructions, primary opcode 0x1F
61	0xFFF00100,0x7D49F02E,lwzx,r10,r9,r30
62	0xFFF00100,0x7FAB806E,lwzux,r29,r11,r16
63	0xFFF00100,0x7C0820AE,lbzx,r0,r8,r4
64	0xFFF00100,0x7F47E8EE,lbzux,r26,r7,r29
65	0xFFF00100,0x7C01612E,stwx,r0,r1,r12
66	0xFFF00100,0x7FC3996E,stwux,r30,r3,r19
67	0xFFF00100,0x7D2C09AE,stbx,r9,r12,r1
68	0xFFF00100,0x7C8531EE,stbux,r4,r5,r6
69	0xFFF00100,0x7C94DA2E,lhzx,r4,r20,r27
70	0xFFF00100,0x7C833A6E,lhzux,r4,r3,r7
71	0xFFF00100,0x7D8F62AE,lhax,r12,r15,r12
72	0xFFF00100,0x7C98DAEE,lhaux,r4,r24,r27
73	0xFFF00100,0x7C0C0B2E,sthx,r0,r12,r1
74	0xFFF00100,0x7C032B6E,sthux,r0,r3,r5
75	0xFFF00100,0x7C43242E,lfsx,fp2,r3,r4
76	0xFFF00100,0x7C43246E,lfsux,fp2,r3,r4
77	0xFFF00100,0x7D491CAE,lfdx,fp10,r9,r3
78	0xFFF00100,0x7C4324EE,lfdux,fp2,r3,r4
79	0xFFF00100,0x7C43252E,stfsx,fp2,r3,r4
80	0xFFF00100,0x7C43256E,stfsux,fp2,r3,r4
81	0xFFF00100,0x7C4325AE,stfdx,fp2,r3,r4
82	0xFFF00100,0x7C4325EE,stfdux,fp2,r3,r4
83	# arithmetic instructions with immediate operand
84	0xFFF00100,0x1F00A81A,mulli,r24,r0,-0x57E6
85	0xFFF00100,0x1D8A4CCC,mulli,r12,r10,0x4CCC
86	0xFFF00100,0x207CFEE0,subfic,r3,r28,-0x120
87	0xFFF00100,0x20894E75,subfic,r4,r9,0x4E75
88	0xFFF00100,0x38BE0000,addi,r5,r30,0x0
89	0xFFF00100,0x3A2EFFF0,addi,r17,r14,-0x10
90	0xFFF00100,0x307F005E,addic,r3,r31,0x5E
91	0xFFF00100,0x30C4FFFF,addic,r6,r4,-0x1
92	0xFFF00100,0x34803012,addic.,r4,r0,0x3012
93	0xFFF00100,0x3E1F4A47,addis,r16,r31,0x4A47
94	0xFFF00100,0x3F3CFFF6,addis,r25,r28,-0xA
95	# subtracts and friends, primary opcode 0x1F
96	0xFFF00100,0x7C03E810,subfc,r0,r3,r29
97	0xFFF00100,0x7CE03011,subfc.,r7,r0,r6
98	0xFFF00100,0x7CC47C10,subfco,r6,r4,r15
99	0xFFF00100,0x7CC46C11,subfco.,r6,r4,r13
100	0xFFF00100,0x7D800850,subf,r12,r0,r1
101	0xFFF00100,0x7C966851,subf.,r4,r22,r13
102	0xFFF00100,0x7C7B8C50,subfo,r3,r27,r17
103	0xFFF00100,0x7D283C51,subfo.,r9,r8,r7
104	0xFFF00100,0x7CE400D0,neg,r7,r4
105	0xFFF00100,0x7CC900D1,neg.,r6,r9
106	0xFFF00100,0x7C6B04D0,nego,r3,r11
107	0xFFF00100,0x7FC004D1,nego.,r30,r0
108	0xFFF00100,0x7D266110,subfe,r9,r6,r12
109	0xFFF00100,0x7C693111,subfe.,r3,r9,r6
110	0xFFF00100,0x7C642D10,subfeo,r3,r4,r5
111	0xFFF00100,0x7C843511,subfeo.,r4,r4,r6
112	0xFFF00100,0x7D6B0190,subfze,r11,r11
113	0xFFF00100,0x7C430191,subfze.,r2,r3
114	0xFFF00100,0x7C640590,subfzeo,r3,r4
115	0xFFF00100,0x7C850591,subfzeo.,r4,r5
116	0xFFF00100,0x7C4301D0,subfme,r2,r3
117	0xFFF00100,0x7C4301D1,subfme.,r2,r3
118	0xFFF00100,0x7D2A1A10,doz,r9,r10,r3
119	0xFFF00100,0x7C642A11,doz.,r3,r4,r5
120	0xFFF00100,0x7C851E10,dozo,r4,r5,r3
121	0xFFF00100,0x7CA41E11,dozo.,r5,r4,r3
122	0xFFF00100,0x7C1E02D0,abs,r0,r30
123	0xFFF00100,0x7C3E02D1,abs.,r1,r30
124	0xFFF00100,0x7FC306D0,abso,r30,r3
125	0xFFF00100,0x7FC706D1,abso.,r30,r7
126	0xFFF00100,0x7CE703D0,nabs,r7,r7
127	0xFFF00100,0x7D0703D1,nabs.,r8,r7
128	0xFFF00100,0x7D0907D0,nabso,r8,r9
129	0xFFF00100,0x7D0A07D1,nabso.,r8,r10
130	# additions, primary opcode 0x1F
131	0xFFF00100,0x7C830014,addc,r4,r3,r0
132	0xFFF00100,0x7FB8F015,addc.,r29,r24,r30
133	0xFFF00100,0x7CDB0414,addco,r6,r27,r0
134	0xFFF00100,0x7C880415,addco.,r4,r8,r0
135	0xFFF00100,0x7D6BC914,adde,r11,r11,r25
136	0xFFF00100,0x7D296115,adde.,r9,r9,r12
137	0xFFF00100,0x7C842514,addeo,r4,r4,r4
138	0xFFF00100,0x7C843515,addeo.,r4,r4,r6
139	0xFFF00100,0x7CE80194,addze,r7,r8
140	0xFFF00100,0x7C800195,addze.,r4,r0
141	# FIXME addzeo
142	# FIXME addzeo.
143	# FIXME addme
144	# FIXME addme.
145	# FIXME addmeo
146	# FIXME addmeo.
147	0xFFF00100,0x7F03EA14,add,r24,r3,r29
148	0xFFF00100,0x7ED6E215,add.,r22,r22,r28
149	0xFFF00100,0x7D040614,addo,r8,r4,r0
150	0xFFF00100,0x7DE40615,addo.,r15,r4,r0
151	# integer multiplications & divisions, primary opcode 0x1F
152	0xFFF00100,0x7C8C5016,mulhwu,r4,r12,r10
153	0xFFF00100,0x7CA72017,mulhwu.,r5,r7,r4
154	0xFFF00100,0x7CA72096,mulhw,r5,r7,r4
155	0xFFF00100,0x7CA72097,mulhw.,r5,r7,r4
156	0xFFF00100,0x7C9000D6,mul,r4,r16,r0
157	0xFFF00100,0x7CA428D7,mul.,r5,r4,r5
158	# FIXME mulo
159	# FIXME mulo.
160	0xFFF00100,0x7D0039D6,mullw,r8,r0,r7
161	0xFFF00100,0x7C1DF1D7,mullw.,r0,r29,r30
162	0xFFF00100,0x7CE725D6,mullwo,r7,r7,r4
163	0xFFF00100,0x7CE725D7,mullwo.,r7,r7,r4
164	0xFFF00100,0x7FEB2296,div,r31,r11,r4
165	0xFFF00100,0x7C064297,div.,r0,r6,r8
166	# FIXME divo
167	# FIXME divo.
168	0xFFF00100,0x7CA03AD6,divs,r5,r0,r7
169	0xFFF00100,0x7C642AD7,divs.,r3,r4,r5
170	# FIXME divso
171	# FIXME divso.
172	0xFFF00100,0x7F7C1B96,divwu,r27,r28,r3
173	0xFFF00100,0x7C7B1B97,divwu.,r3,r27,r3
174	0xFFF00100,0x7CE62796,divwuo,r7,r6,r4
175	0xFFF00100,0x7CE62797,divwuo.,r7,r6,r4
176	0xFFF00100,0x7C042BD6,divw,r0,r4,r5
177	0xFFF00100,0x7C042BD7,divw.,r0,r4,r5
178	0xFFF00100,0x7CA627D6,divwo,r5,r6,r4
179	0xFFF00100,0x7CA627D7,divwo.,r5,r6,r4
180	# move to condition register, primary opcode 0x1F
181	0xFFF00100,0x7D818120,mtcrf,0x18,r12
182	0xFFF00100,0x7D838120,mtcrf,0x38,r12
183	0xFFF00100,0x7D080120,mtcrf,0x80,r8
184	0xFFF00100,0x7E007120,mtcrf,0x07,r16
185	# rotation instructions
186	0xFFF00100,0x5084442E,rlwimi,r4,r4,8,16,23
187	0xFFF00100,0x5400EFFE,rlwinm,r0,r0,29,31,31
188	# shift instructions, primary opcode 0x1F
189	0xFFF00100,0x7C695830,slw,r9,r3,r11
190	0xFFF00100,0x7C00F831,slw.,r0,r0,r31
191	0xFFF00100,0x7FC4FC30,srw,r4,r30,r31
192	0xFFF00100,0x7CE92C31,srw.,r9,r7,r5
193	0xFFF00100,0x7D235E30,sraw,r3,r9,r11
194	0xFFF00100,0x7D290631,sraw.,r9,r9,r0
195	0xFFF00100,0x7C65FE70,srawi,r5,r3,0x1F
196	0xFFF00100,0x7D6B1E70,srawi,r11,r11,0x3
197	0xFFF00100,0x7C090E71,srawi.,r9,r0,0x1
198	# logical instructions, primary opcode 0x1F
199	0xFFF00100,0x7FC32838,and,r3,r30,r5
200	0xFFF00100,0x7C672039,and.,r7,r3,r4
201	0xFFF00100,0x7D281878,andc,r8,r9,r3
202	0xFFF00100,0x7DCE0079,andc.,r14,r14,r0
203	0xFFF00100,0x7C8328F8,nor,r3,r4,r5
204	0xFFF00100,0x7D4948F9,nor.,r9,r10,r9
205	0xFFF00100,0x7ED53A38,eqv,r21,r22,r7
206	0xFFF00100,0x7C622239,eqv.,r2,r3,r4
207	0xFFF00100,0x7D645278,xor,r4,r11,r10
208	0xFFF00100,0x7C600279,xor.,r0,r3,r0
209	0xFFF00100,0x7C841B38,orc,r4,r4,r3
210	0xFFF00100,0x7C841B39,orc.,r4,r4,r3
211	0xFFF00100,0x7DE42378,or,r4,r15,r4
212	0xFFF00100,0x7C632379,or.,r3,r3,r4
213	0xFFF00100,0x7C6023B8,nand,r0,r3,r4
214	0xFFF00100,0x7F8B63B9,nand.,r11,r28,r12
215	#logical immediate instructions
216	0xFFF00100,0x60009BA5,ori,r0,r0,0x9BA5
217	0xFFF00100,0x6744AAAA,oris,r4,r26,0xAAAA
218	# synchronization instructions
219	0xFFF00100,0x7D201828,lwarx,r9,0,r3
220	0xFFF00100,0x7D20192D,stwcx.,r9,0,r3
221	0xFFF00100,0x7FAB052C,stwbrx,r29,r11,r0
222	0xFFF03000,0x4C00012C,isync
223	0xFFF00100,0x7C0004AC,sync
224	0xFFF00100,0x7C0006AC,eieio
225	0xFFF00100,0x7C05272C,sthbrx,r0,r5,r4
226	# trap instructions
227	0xFFF00100,0x7F800008,tw,28,r0,r0
228	0xFFF00100,0x0C000000,twi,0,r0,0
229	# integer load and stores
230	0xFFF00100,0x80BF0808,lwz,r5,0x808(r31)
231	0xFFF00100,0x80A2FFB8,lwz,r5,-0x48(r2)
232	0xFFF00100,0x80002F3C,lwz,r0,0x2F3C
233	0xFFF00100,0x8506003C,lwzu,r8,0x3C(r6)
234	0xFFF00100,0x8403FFF8,lwzu,r0,-0x8(r3)
235	0xFFF00100,0x88FD00FA,lbz,r7,0xFA(r29)
236	0xFFF00100,0x889EFFF4,lbz,r4,-0xC(r30)
237	0xFFF00100,0x8D480001,lbzu,r10,0x1(r8)
238	0xFFF00100,0x8FC3FFFF,lbzu,r30,-0x1(r3)
239	0xFFF00100,0x90600AFC,stw,r3,0xAFC
240	0xFFF00100,0x9000F620,stw,r0,-0x9E0
241	0xFFF00100,0x9146696E,stw,r10,0x696E(r6)
242	0xFFF00100,0x9317FFF0,stw,r24,-0x10(r23)
243	0xFFF00100,0x94050020,stwu,r0,0x20(r5)
244	0xFFF00100,0x9421FFA0,stwu,r1,-0x60(r1)
245	0xFFF00100,0x981F00FA,stb,r0,0xFA(r31)
246	0xFFF00100,0x98829882,stb,r4,-0x677E(r2)
247	0xFFF00100,0x9EFC000A,stbu,r23,0xA(r28)
248	0xFFF00100,0x9FAEFFFC,stbu,r29,-0x4(r14)
249	0xFFF00100,0xA22E6010,lhz,r17,0x6010(r14)
250	0xFFF00100,0xA0C6FFF8,lhz,r6,-0x8(r6)
251	0xFFF00100,0xA43C6010,lhzu,r1,0x6010(r28)
252	0xFFF00100,0xA7BFFFFE,lhzu,r29,-0x2(r31)
253	0xFFF00100,0xA820265F,lha,r1,0x265F
254	0xFFF00100,0xA8B5201F,lha,r5,0x201F(r21)
255	0xFFF00100,0xAAFEFE82,lha,r23,-0x17E(r30)
256	0xFFF00100,0xAC08003C,lhau,r0,0x3C(r8)
257	0xFFF00100,0xAC90FFFE,lhau,r4,-0x2(r16)
258	0xFFF00100,0xB3E40012,sth,r31,0x12(r4)
259	0xFFF00100,0xB02EFFFB,sth,r1,-0x5(r14)
260	0xFFF00100,0xB4B81EF4,sthu,r5,0x1EF4(r24)
261	0xFFF00100,0xB774FFFE,sthu,r27,-0x2(r20)
262	0xFFF00100,0xBB61006C,lmw,r27,0x6C(r1)
263	0xFFF00100,0xBB41FFE8,lmw,r26,-0x18(r1)
264	0xFFF00100,0xBC410008,stmw,r2,0x8(r1)
265	0xFFF00100,0xBFC1FFF8,stmw,r30,-0x8(r1)
266	0xFFF00100,0xD58B0004,stfsu,f12,4(r11)
267	#floating point operations
268	0xFFF00100,0xFC03282A,fadd,f0,f3,f5
269	0xFFF00100,0xFDAD682B,fadd.,f13,f13,f13
270	0xFFF00100,0xFC0D0024,fdiv,f0,f13,f0
271	0xFFF00100,0xFC2B0025,fdiv.,f1,f11,f0
272	0xFFF00100,0xFD8952FC,fnmsub,f12,f9,f11,f10
273	0xFFF00100,0xFD600110,fnabs,f11,f0
274	0xFFF00100,0xFD002034,frsqrte,f8,f4
275	0xFFF00100,0x7FF957AE,stfiwx,f31,r25,r10
276	#compare instructions
277	0xFFF00100,0x7FBFB800,cmp,cr7,1,r31,r23
278	0xFFF00100,0x7FA05840,cmpl,cr7,1,r0,r11
279	0xFFF00100,0x2FA90000,cmpi,cr7,1,r9,0x0
280	0xFFF00100,0x2AA3FFFF,cmpli,cr5,1,r3,0xFFFF
281	0xFFF00100,0xFE17C840,fcmpo,cr4,f23,f25
282	0xFFF00100,0xFF0C6800,fcmpu,cr6,f12,f13
283	# misc instructions
284	0xFFF00100,0x7D290034,cntlzw,r9,r9
285	0xFFF00100,0x7FFF0035,cntlzw.,r31,r31
286	0xFFF00100,0x7C00D7AC,icbi,r0,r26
287	0xFFF00100,0x7D604828,lwarx,r11,0,r9
288	0xFFF00100,0x7CBC04AA,lswi,r5,r28,0x20
289	0xFFF00100,0x7FEF2C2A,lswx,r31,r15,r5
290	0xFFF00100,0x7E000400,mcrxr,cr4
291	0xFFF00100,0xFFE0004C,mtfsb1,31
292	0xFFF00100,0xFFE0048F,mffs.,f31
293	0xFFF00100,0x7FEF01A4,mtsr,15,r31
294	0xFFF00100,0x7C6021E4,mtsrin,r3,r4
295	0xFFF00100,0x7CA305AA,stswi,r5,r3,0x20
296	0xFFF00100,0x7D453D2A,stswx,r10,r5,r7
297	0xFFF00100,0x7C0002E4,tlbia
298	0xFFF00100,0x7C004A64,tlbie,r9
299	# various simplified (extended) mnemonics
300	0xFFF00100,0x60000000,nop
301	0xFFF00100,0x7C7C1B78,mr,r28,r3
302	0xFFF00100,0x7C7C1B78,mr,r28,r3
303	0xFFF00100,0x7DAA6B79,mr.,r10,r13
304	0xFFF00100,0x38000000,li,r0,0x0
305	0xFFF00100,0x3860FFCE,li,r3,-0x32
306	# invalid opcodes/instruction forms
307	0xFFF00100,0x7D49F02F,dc.l,0x7D49F02F
308	0xFFF00100,0x7F800009,dc.l,0x7F800009
309	0xFFF00100,0x7C6B0CD0,dc.l,0x7C6B0CD0
310	0xFFF00100,0x7C642D90,dc.l,0x7C642D90
311	# POWER/PPC601 specific instructions
312	0xFFF00100,0x7C440426,clcs,r2,r4
313	0xFFF00100,0x24000800,dozi,r0,r0,0x800
314	0xFFF00100,0x7C00003A,maskg,r0,r0,r0
315	0xFFF00100,0x7E3EE43A,maskir,r30,r17,r28