mirror of
https://github.com/dingusdev/dingusppc.git
synced 2024-08-28 05:29:15 +00:00
genppctests.py - Fix incorrect bits for some floating-point instruction opcodes or fields. - Use separate register for FP results like DolphinPPCTests does. - Remove extra FMULS. - Use a regular expression for parsing ppcfloattest.txt. Don't parse the values, just put them in the output ppcloattests.csv file. ppcfloattest.txt - Clear crf0 and crf7 because we only care about crf1. - Use values from DolphinPPCTests (0.0, 0.5, 1.0, 3.5, DBL_MAX, FLT_MAX, 2.4679999352, 4.9359998704, etc.). Some of the values were rounded. This will un-round them. Specify snan or qnan instead of nan. - One of the FCMPO and FCMPU tests had qnan instead of snan input values. ppcfloattest.csv - Regenerate this file using the updated genppctests.py which uses the updated ppcfloattest.txt. ppctests - Update double_from_string to be able to parse the new values (snan, qnan, FLT_MAX, DBL_MAX).
449 lines
22 KiB
Python
Executable File
449 lines
22 KiB
Python
Executable File
import re
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def gen_ppc_opcode(opc_str, imm):
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if opc_str == "ADD":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x10A << 1)
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elif opc_str == "ADD.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x10A << 1) + 1
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elif opc_str == "ADDC":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0xA << 1)
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elif opc_str == "ADDC.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0xA << 1) + 1
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elif opc_str == "ADDCO":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x20A << 1)
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elif opc_str == "ADDCO.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x20A << 1) + 1
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elif opc_str == "ADDO":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x30A << 1)
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elif opc_str == "ADDO.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x30A << 1) + 1
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elif opc_str == "ADDE":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x8A << 1)
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elif opc_str == "ADDE.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x8A << 1) + 1
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elif opc_str == "ADDEO":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x28A << 1)
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elif opc_str == "ADDEO.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x28A << 1) + 1
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elif opc_str == "ADDI":
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return (0x0E << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
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elif opc_str == "ADDIC":
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return (0x0C << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
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elif opc_str == "ADDIC.":
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return (0x0D << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
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elif opc_str == "ADDIS":
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return (0x0F << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
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elif opc_str == "ADDME":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0xEA << 1)
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elif opc_str == "ADDME.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0xEA << 1) + 1
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elif opc_str == "ADDMEO":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x2EA << 1)
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elif opc_str == "ADDMEO.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x2EA << 1) + 1
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elif opc_str == "ADDZE":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0xCA << 1)
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elif opc_str == "ADDZE.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0xCA << 1) + 1
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elif opc_str == "ADDZEO":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x2CA << 1)
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elif opc_str == "ADDZEO.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x2CA << 1) + 1
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elif opc_str == "AND":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x1C << 1)
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elif opc_str == "AND.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x1C << 1) + 1
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elif opc_str == "ANDC":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x3C << 1)
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elif opc_str == "ANDC.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x3C << 1) + 1
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elif opc_str == "ANDI.":
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return (0x1C << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
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elif opc_str == "ANDIS.":
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return (0x1D << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
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elif opc_str == "CMP":
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return (0x1F << 26) + (3 << 16) + (4 << 11)
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elif opc_str == "CMPI":
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return (0x0B << 26) + (0 << 21) + (3 << 16) + (imm & 0xFFFF)
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elif opc_str == "CMPL":
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return (0x1F << 26) + (3 << 16) + (4 << 11) + (0x20 << 1)
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elif opc_str == "CMPLI":
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return (0x0A << 26) + (0 << 21) + (3 << 16) + (imm & 0xFFFF)
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elif opc_str == "CNTLZW":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x1A << 1)
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elif opc_str == "CNTLZW.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x1A << 1) + 1
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elif opc_str == "DIVW":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x1EB << 1)
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elif opc_str == "DIVW.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x1EB << 1) + 1
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elif opc_str == "DIVWO":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x3EB << 1)
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elif opc_str == "DIVWO.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x3EB << 1) + 1
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elif opc_str == "DIVWU":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x1CB << 1)
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elif opc_str == "DIVWU.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x1CB << 1) + 1
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elif opc_str == "DIVWUO":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x3CB << 1)
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elif opc_str == "DIVWUO.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x3CB << 1) + 1
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elif opc_str == "EQV":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x11C << 1)
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elif opc_str == "EQV.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x11C << 1) + 1
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elif opc_str == "EXTSB":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x3BA << 1)
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elif opc_str == "EXTSB.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x3BA << 1) + 1
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elif opc_str == "EXTSH":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x39A << 1)
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elif opc_str == "EXTSH.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x39A << 1) + 1
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elif opc_str == "FABS":
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return (0x3F << 26) + (3 << 21) + (0 << 16) + (4 << 11) + (0x108 << 1)
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elif opc_str == "FABS.":
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return (0x3F << 26) + (3 << 21) + (0 << 16) + (4 << 11) + (0x108 << 1) + 1
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elif opc_str == "FADD":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x15 << 1)
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elif opc_str == "FADD.":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x15 << 1) + 1
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elif opc_str == "FADDS":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x15 << 1)
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elif opc_str == "FADDS.":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x15 << 1) + 1
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elif opc_str == "FCMPO":
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return (0x3F << 26) + (4 << 21) + (4 << 16) + (5 << 11) + (0x20 << 1)
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elif opc_str == "FCMPU":
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return (0x3F << 26) + (4 << 21) + (4 << 16) + (5 << 11)
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elif opc_str == "FCTIW":
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return (0x3F << 26) + (0 << 16) + (4 << 11) + (0xE << 1)
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elif opc_str == "FCTIW.":
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return (0x3F << 26) + (0 << 16) + (4 << 11) + (0xE << 1) + 1
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elif opc_str == "FCTIWZ":
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return (0x3F << 26) + (0 << 16) + (4 << 11) + (0xF << 1)
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elif opc_str == "FCTIWZ.":
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return (0x3F << 26) + (0 << 16) + (4 << 11) + (0xF << 1) + 1
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elif opc_str == "FDIV":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x12 << 1)
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elif opc_str == "FDIV.":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x12 << 1) + 1
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elif opc_str == "FDIVS":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x12 << 1)
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elif opc_str == "FDIVS.":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x12 << 1) + 1
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elif opc_str == "FMADD":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1D << 1)
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elif opc_str == "FMADD.":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1D << 1) + 1
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elif opc_str == "FMADDS":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1D << 1)
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elif opc_str == "FMADDS.":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1D << 1) + 1
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elif opc_str == "FMUL":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (6 << 6) + (0x19 << 1)
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elif opc_str == "FMUL.":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (6 << 6) + (0x19 << 1) + 1
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elif opc_str == "FMULS":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (6 << 6) + (0x19 << 1)
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elif opc_str == "FMULS.":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (6 << 6) + (0x19 << 1) + 1
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elif opc_str == "FNABS":
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return (0x3F << 26) + (3 << 21) + (4 << 11) + (0x88 << 1)
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elif opc_str == "FNABS.":
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return (0x3F << 26) + (3 << 21) + (4 << 11) + (0x88 << 1) + 1
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elif opc_str == "FNEG":
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return (0x3F << 26) + (3 << 21) + (4 << 11) + (0x28 << 1)
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elif opc_str == "FNEG.":
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return (0x3F << 26) + (3 << 21) + (4 << 11) + (0x28 << 1) + 1
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elif opc_str == "FMSUB":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1C << 1)
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elif opc_str == "FMSUB.":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1C << 1) + 1
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elif opc_str == "FMSUBS":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1C << 1)
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elif opc_str == "FMSUBS.":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1C << 1) + 1
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elif opc_str == "FNMADD":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1F << 1)
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elif opc_str == "FNMADD.":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1F << 1) + 1
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elif opc_str == "FNMADDS":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1F << 1)
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elif opc_str == "FNMADDS.":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1F << 1) + 1
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elif opc_str == "FNMSUB":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1E << 1)
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elif opc_str == "FNMSUB.":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1E << 1) + 1
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elif opc_str == "FNMSUBS":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1E << 1)
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elif opc_str == "FNMSUBS.":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (6 << 6) + (0x1E << 1) + 1
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elif opc_str == "FRES":
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return (0x3B << 26) + (3 << 21) + (4 << 11) + (0x18 << 1)
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elif opc_str == "FSUB":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x14 << 1)
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elif opc_str == "FSUB.":
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return (0x3F << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x14 << 1) + 1
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elif opc_str == "FSUBS":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x14 << 1)
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elif opc_str == "FSUBS.":
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return (0x3B << 26) + (3 << 21) + (4 << 16) + (5 << 11) + (0x14 << 1) + 1
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elif opc_str == "MULHW":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x4B << 1)
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elif opc_str == "MULHW.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x4B << 1) + 1
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elif opc_str == "MULHWU":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0xB << 1)
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elif opc_str == "MULHWU.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0xB << 1) + 1
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elif opc_str == "MULLI":
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return (0x07 << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
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elif opc_str == "MULLW":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0xEB << 1)
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elif opc_str == "MULLW.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0xEB << 1) + 1
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elif opc_str == "MULLWO":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x2EB << 1)
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elif opc_str == "MULLWO.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x2EB << 1) + 1
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elif opc_str == "NAND":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x1DC << 1)
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elif opc_str == "NAND.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x1DC << 1) + 1
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elif opc_str == "NEG":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x68 << 1)
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elif opc_str == "NEG.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x68 << 1) + 1
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elif opc_str == "NEGO":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x268 << 1)
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elif opc_str == "NEGO.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x268 << 1) + 1
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elif opc_str == "NOR":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x7C << 1)
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elif opc_str == "NOR.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x7C << 1) + 1
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elif opc_str == "OR":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x1BC << 1)
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elif opc_str == "OR.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x1BC << 1) + 1
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elif opc_str == "ORC":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x19C << 1)
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elif opc_str == "ORC.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x19C << 1) + 1
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elif opc_str == "ORI":
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return (0x18 << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
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elif opc_str == "ORIS":
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return (0x19 << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
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elif opc_str == "SLW":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x18 << 1)
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elif opc_str == "SLW.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x18 << 1) + 1
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elif opc_str == "SRAW":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x318 << 1)
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elif opc_str == "SRAW.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x318 << 1) + 1
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elif opc_str == "SRAWI":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + ((imm & 0x1F) << 11) + (0x338 << 1)
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elif opc_str == "SRAWI.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + ((imm & 0x1F) << 11) + (0x338 << 1) + 1
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elif opc_str == "SRW":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x218 << 1)
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elif opc_str == "SRW.":
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return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x218 << 1) + 1
|
|
elif opc_str == "SUBF":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x28 << 1)
|
|
elif opc_str == "SUBF.":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x28 << 1) + 1
|
|
elif opc_str == "SUBFO":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x228 << 1)
|
|
elif opc_str == "SUBFO.":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x228 << 1) + 1
|
|
elif opc_str == "SUBFC":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x8 << 1)
|
|
elif opc_str == "SUBFC.":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x8 << 1) + 1
|
|
elif opc_str == "SUBFCO":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x208 << 1)
|
|
elif opc_str == "SUBFCO.":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x208 << 1) + 1
|
|
elif opc_str == "SUBFE":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x88 << 1)
|
|
elif opc_str == "SUBFE.":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x88 << 1) + 1
|
|
elif opc_str == "SUBFEO":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x288 << 1)
|
|
elif opc_str == "SUBFEO.":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x288 << 1) + 1
|
|
elif opc_str == "SUBFIC":
|
|
return (0x08 << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
|
|
elif opc_str == "SUBFME":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (0xE8 << 1)
|
|
elif opc_str == "SUBFME.":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (0xE8 << 1) + 1
|
|
elif opc_str == "SUBFMEO":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x2E8 << 1)
|
|
elif opc_str == "SUBFMEO.":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x2E8 << 1) + 1
|
|
elif opc_str == "SUBFZE":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (0xC8 << 1)
|
|
elif opc_str == "SUBFZE.":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (0xC8 << 1) + 1
|
|
elif opc_str == "SUBFZEO":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x2C8 << 1)
|
|
elif opc_str == "SUBFZEO.":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (0x2C8 << 1) + 1
|
|
elif opc_str == "XOR":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x13C << 1)
|
|
elif opc_str == "XOR.":
|
|
return (0x1F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x13C << 1) + 1
|
|
elif opc_str == "XORI":
|
|
return (0x1A << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
|
|
elif opc_str == "XORIS":
|
|
return (0x1B << 26) + (3 << 21) + (3 << 16) + (imm & 0xFFFF)
|
|
|
|
def gen_rot_opcode(opc_str, sh, mb, me):
|
|
if opc_str == "RLWIMI":
|
|
return (0x14 << 26) + (4 << 21) + (3 << 16) + (sh << 11) + (mb << 6) + (me << 1)
|
|
elif opc_str == "RLWIMI.":
|
|
return (0x14 << 26) + (4 << 21) + (3 << 16) + (sh << 11) + (mb << 6) + (me << 1) + 1
|
|
elif opc_str == "RLWINM":
|
|
return (0x15 << 26) + (4 << 21) + (3 << 16) + (sh << 11) + (mb << 6) + (me << 1)
|
|
elif opc_str == "RLWINM.":
|
|
return (0x15 << 26) + (4 << 21) + (3 << 16) + (sh << 11) + (mb << 6) + (me << 1) + 1
|
|
|
|
def extract_imm(line):
|
|
pos = 12
|
|
while pos < len(line):
|
|
reg_id = line[pos:pos+4]
|
|
if reg_id.startswith("rD") or reg_id.startswith("rA"):
|
|
pos += 16
|
|
elif reg_id.startswith("rB"):
|
|
pos += 16
|
|
elif reg_id.startswith("XER:"):
|
|
pos += 18
|
|
elif reg_id.startswith("CR:"):
|
|
pos += 17
|
|
elif reg_id.startswith("imm"):
|
|
return int(line[pos+4:pos+14], base=16)
|
|
return 0
|
|
|
|
def extract_rot_params(line):
|
|
pos = 12
|
|
sh = 0
|
|
mb = 0
|
|
me = 0
|
|
while pos < len(line):
|
|
reg_id = line[pos:pos+4]
|
|
if reg_id.startswith("rD") or reg_id.startswith("rA") or reg_id.startswith("rB") or reg_id.startswith("rS"):
|
|
pos += 16
|
|
elif reg_id.startswith("XER:"):
|
|
pos += 18
|
|
elif reg_id.startswith("CR:"):
|
|
pos += 17
|
|
elif reg_id.startswith("SH"):
|
|
sh = int(line[pos+3:pos+13], base=16)
|
|
pos += 16
|
|
elif reg_id.startswith("MB"):
|
|
mb = int(line[pos+3:pos+13], base=16)
|
|
pos += 16
|
|
elif reg_id.startswith("ME"):
|
|
me = int(line[pos+3:pos+13], base=16)
|
|
pos += 16
|
|
return (sh, mb, me)
|
|
|
|
if __name__ == "__main__":
|
|
with open("ppcinttest.txt", "r") as in_file:
|
|
with open("ppcinttests.csv", "w") as out_file:
|
|
lineno = 0
|
|
for line in in_file:
|
|
lineno += 1
|
|
|
|
line = line.strip()
|
|
opcode = (line[0:8]).rstrip().upper()
|
|
out_file.write(opcode + ",")
|
|
|
|
if opcode.startswith("RLWI"):
|
|
sh, mb, me = extract_rot_params(line)
|
|
out_file.write("0x{:X}".format(gen_rot_opcode(opcode, sh, mb, me)))
|
|
else:
|
|
imm = extract_imm(line)
|
|
out_file.write("0x{:X}".format(gen_ppc_opcode(opcode, imm)))
|
|
|
|
pos = 12
|
|
|
|
while pos < len(line):
|
|
reg_id = line[pos:pos+4]
|
|
if reg_id.startswith("rD"):
|
|
out_file.write(",rD=" + line[pos+3:pos+13])
|
|
pos += 16
|
|
elif reg_id.startswith("rA"):
|
|
out_file.write(",rA=" + line[pos+3:pos+13])
|
|
pos += 16
|
|
elif reg_id.startswith("rB") or reg_id.startswith("rS"):
|
|
out_file.write(",rB=" + line[pos+3:pos+13])
|
|
pos += 16
|
|
elif reg_id.startswith("XER:"):
|
|
out_file.write(",XER=" + line[pos+5:pos+15])
|
|
pos += 18
|
|
elif reg_id.startswith("CR:"):
|
|
out_file.write(",CR=" + line[pos+4:pos+14])
|
|
pos += 17
|
|
elif reg_id.startswith("imm"):
|
|
pos += 17 # ignore immediate operands
|
|
elif reg_id.startswith("SH"):
|
|
pos += 16
|
|
elif reg_id.startswith("MB") or reg_id.startswith("ME"):
|
|
pos += 16
|
|
else:
|
|
out_file.write("Unknown reg ID" + reg_id)
|
|
break
|
|
|
|
out_file.write("\n")
|
|
|
|
floatRE = re.compile('^([\w]+\.?) +(?:\((\w+)\) )?:: (?:(fr[ABCD]) +([^ ]+) \| )?(?:(fr[ABCD]) +([^ ]+) \| )?(?:(fr[ABCD]) +([^ ]+) \| )?(?:(fr[ABCD]) +([^ ]+) \| )?FPSCR: (0x\w+) \| CR: (0x\w+)$')
|
|
|
|
with open("ppcfloattest.txt", "r") as in_file:
|
|
with open("ppcfloattests.csv", "w") as out_file:
|
|
lineno = 0
|
|
for line in in_file:
|
|
lineno += 1
|
|
|
|
line = line.strip()
|
|
|
|
p = floatRE.match(line)
|
|
if p:
|
|
opcode = p.group(1).upper();
|
|
out_file.write(opcode+ ",")
|
|
out_file.write("0x{:X}".format(gen_ppc_opcode(opcode, 0)))
|
|
|
|
if p.group(2) == "RTNI":
|
|
out_file.write(",round=RNI")
|
|
elif p.group(2) == "RTN":
|
|
out_file.write(",round=RTN")
|
|
elif p.group(2) == "RTZ":
|
|
out_file.write(",round=RTZ")
|
|
elif p.group(2) == "RTPI":
|
|
out_file.write(",round=RPI")
|
|
elif p.group(2) == "VE":
|
|
out_file.write(",round=VEN")
|
|
elif p.group(2) != None:
|
|
print("Warning: line: [%d] unknown round \"%s\"\n" % (lineno, p.group(2)))
|
|
|
|
if p.group(3) != None:
|
|
out_file.write(",%s=%s" % (p.group(3), p.group(4)))
|
|
if p.group(5) != None:
|
|
out_file.write(",%s=%s" % (p.group(5), p.group(6)))
|
|
if p.group(7) != None:
|
|
out_file.write(",%s=%s" % (p.group(7), p.group(8)))
|
|
if p.group(9) != None:
|
|
out_file.write(",%s=%s" % (p.group(9), p.group(10)))
|
|
|
|
out_file.write(",FPSCR=%s" % p.group(11))
|
|
out_file.write(",CR=%s" % p.group(12))
|
|
out_file.write("\n")
|
|
else:
|
|
print("Warning: line: [%d] \"%s\"\n" % (lineno, line))
|