mirror of
https://github.com/dingusdev/dingusppc.git
synced 2024-12-25 18:29:49 +00:00
152 lines
4.1 KiB
C++
152 lines
4.1 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-24 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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/** @file TNT on-board NTSC/PAL video output definitions. */
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#ifndef SIXTY6_VIDEO_H
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#define SIXTY6_VIDEO_H
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#include <devices/ioctrl/macio.h>
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#include <devices/video/videoctrl.h>
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#include <cinttypes>
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#include <memory>
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namespace Sixty6BaseReg {
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enum Sixty6BaseReg : uint32_t {
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CLUT_DATA = 0x00, // Open Firmware chaos reads PRSNT_BITS from here!?
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CLUT_ADDR = 0x01,
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CONTROL_DATA = 0x02,
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CONTROL_ADDR = 0x03,
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};
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};
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namespace Sixty6Reg {
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enum Sixty6Reg : uint32_t {
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// registers 0x00..0x7f are writable; unused in sixty6; Hardware Cursor for ninety9
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REG_V1O_L = 0x80, // 8 bits
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REG_V1O_H = 0x81, // 2 bits
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REG_V2O_L = 0x82, // 8 bits
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REG_V2O_H = 0x83, // 2 bits
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REG_V1E_L = 0x84, // 8 bits
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REG_V1E_H = 0x85, // 2 bits
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REG_V2E_L = 0x86, // 8 bits
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REG_V2E_H = 0x87, // 2 bits
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REG_H1_L = 0x88, // 8 bits
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REG_H1_H = 0x89, // 2 bits
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REG_H2_L = 0x8a, // 8 bits
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REG_H2_H = 0x8b, // 2 bits
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BASE_ADDR_L = 0x8c, // 8 bits
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BASE_ADDR_M = 0x8d, // 8 bits
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BASE_ADDR_H = 0x8e, // 2 bits
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PITCH_L = 0x8f, // 8 bits
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PITCH_H = 0x90, // 3 bits
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CURSOR_X_L = 0x91, // 8 bits
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CURSOR_X_H = 0x92, // 2 bits
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CURSOR_Y_L = 0x93, // 8 bits
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CURSOR_Y_H = 0x94, // 2 bits
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INT_COUNT_L = 0x95, // 8 bits
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INT_COUNT_H = 0x96, // 2 bits
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CONTROL_1 = 0x97, // 8 bits // 0x00, 0x02, 0x40, 0x48, 0x49, 0x79
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// 0x01: ?
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// 0x02: hardware cursor enable (read-only as 0 for sixty6)
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// 0x04: zoom
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// 0x08: ?
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// 0x30: pixel depth: 0 = 8-bit indexed, 2 = 16 bit, 3 = 32 bit
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// 0x40: interrupt enable
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// 0x80: interrupt
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CONTROL_2 = 0x98, // 8 bits // 0x02, 0x03
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// 0x01: ?
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// 0x02: ?
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// registers 0x99..0xff are read only and read from registers 0x19..0x7F.
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};
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};
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class Saa7187VideoEncoder;
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class ControlVideo;
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class Sixty6Video: public VideoCtrlBase, public IobusDevice, public HWComponent {
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public:
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Sixty6Video();
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static std::unique_ptr<HWComponent> create() {
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return std::unique_ptr<Sixty6Video>(new Sixty6Video());
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}
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protected:
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void enable_display();
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void disable_display();
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// HWComponent methods
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int device_postinit();
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// IobusDevice methods
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uint16_t iodev_read(uint32_t address);
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void iodev_write(uint32_t address, uint16_t value);
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uint8_t control_addr = 0;
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uint8_t clut_addr = 0;
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uint8_t clut_color[3];
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uint8_t comp_index = 0;
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uint16_t v1_odd = 0;
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uint16_t v2_odd = 0;
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uint16_t v1_even = 0;
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uint16_t v2_even = 0;
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uint16_t h1 = 0;
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uint16_t h2 = 0;
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uint32_t base_addr = 0;
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uint16_t pitch = 0;
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uint16_t cursor_x = 0;
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uint16_t cursor_y = 0;
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uint16_t int_count = 0;
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uint8_t control_1 = 0;
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bool interrupt_enabled = false;
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uint8_t control_2 = 0;
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uint8_t last_control_1_value = 0;
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uint8_t last_control_1_count = 0;
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bool changed = false;
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std::unique_ptr<Saa7187VideoEncoder> saa7187;
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ControlVideo * control_video = nullptr;
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};
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#endif // SIXTY6_VIDEO_H
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