mirror of
https://github.com/dingusdev/dingusppc.git
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116 lines
3.3 KiB
C++
116 lines
3.3 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-22 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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/** @file NCR53C94/Am53CF94 SCSI controller emulation. */
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#include "sc53c94.h"
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#include <loguru.hpp>
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#include <cinttypes>
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void Sc53C94::reset_device()
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{
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// part-unique ID to be read using a magic sequence
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this->set_xfer_count = this->chip_id << 16;
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this->clk_factor = 2;
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this->sel_timeout = 0;
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}
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uint8_t Sc53C94::read(uint8_t reg_offset)
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{
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switch (reg_offset) {
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case Read::Reg53C94::Xfer_Cnt_Hi:
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if (this->config2 & CFG2_ENF) {
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return (this->xfer_count >> 16) & 0xFFU;
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}
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break;
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default:
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LOG_F(9, "NCR53C94: reading from register %d", reg_offset);
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}
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return 0;
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}
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void Sc53C94::write(uint8_t reg_offset, uint8_t value)
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{
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switch (reg_offset) {
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case Write::Reg53C94::Command:
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add_command(value);
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break;
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case Write::Reg53C94::Sel_Timeout:
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this->sel_timeout = value;
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break;
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case Write::Reg53C94::Clock_Factor:
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this->clk_factor = value;
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break;
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case Write::Reg53C94::Config_1:
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this->config1 = value;
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break;
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case Write::Reg53C94::Config_2:
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this->config2 = value;
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break;
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case Write::Reg53C94::Config_3:
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this->config3 = value;
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break;
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default:
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LOG_F(INFO, "SC53C94: writing 0x%X to %d register", value, reg_offset);
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}
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}
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void Sc53C94::add_command(uint8_t cmd)
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{
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bool is_dma_cmd = !!(cmd & 0x80);
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cmd &= 0x7F;
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if (this->on_reset && cmd != CMD_NOP) {
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LOG_F(WARNING, "SC53C94: command register blocked after RESET!");
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return;
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}
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// NOTE: Reset Device (chip), Reset Bus and DMA Stop commands execute
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// immediately while all others are placed into the command FIFO
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switch (cmd) {
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case CMD_RESET_DEVICE:
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reset_device();
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this->on_reset = true; // block the command register
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return;
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case CMD_RESET_BUS:
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LOG_F(ERROR, "SC53C94: RESET_BUS command not implemented yet");
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return;
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case CMD_DMA_STOP:
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LOG_F(ERROR, "SC53C94: TARGET_DMA_STOP command not implemented yet");
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return;
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}
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// HACK: commands should be placed into the command FIFO
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if (cmd == CMD_NOP) {
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if (is_dma_cmd) {
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if (this->config2 & CFG2_ENF) { // extended mode: 24-bit
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this->xfer_count = this->set_xfer_count & 0xFFFFFFUL;
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} else { // standard mode: 16-bit
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this->xfer_count = this->set_xfer_count & 0xFFFFUL;
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}
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}
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this->on_reset = false;
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}
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}
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