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PCCard is used by PowerBook G3 Wallstreet in Open Firmware 2.0.1. CardBus is probed in New World Macs starting from at least Open Firmware 4.1.9f1 sometime after Open Firmware 3.1.1. - Create PCIBase from common stuff in PCIDevice. - Add PCIBridgeBase. These have a primary bus number, secondary bus number, and subordinate bus number which are used to determine if PCI type 1 config cycle should be passed. - Change PCIBridge to use PCIBridgeBase instead of PCIDevice. - Add PCICardBusBridge which uses PCIBridgeBase.
56 lines
1.9 KiB
C++
56 lines
1.9 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-23 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef PCI_DEVICE_H
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#define PCI_DEVICE_H
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#include <devices/common/pci/pcibase.h>
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/** PCI configuration space registers offsets */
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enum {
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PCI_CFG_BAR2 = 0x18, // base address register 2
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PCI_CFG_BAR3 = 0x1C, // base address register 3
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PCI_CFG_BAR4 = 0x20, // base address register 4
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PCI_CFG_BAR5 = 0x24, // base address register 5
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PCI_CFG_CIS_PTR = 0x28, // Cardbus CIS Pointer
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PCI_CFG_SUBSYS_ID = 0x2C, // Subsysten IDs
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PCI_CFG_ROM_BAR = 0x30, // expansion ROM base address
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};
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class PCIDevice : public PCIBase {
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public:
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PCIDevice(std::string name);
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virtual ~PCIDevice() = default;
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// configuration space access methods
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virtual uint32_t pci_cfg_read(uint32_t reg_offs, AccessDetails &details);
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virtual void pci_cfg_write(uint32_t reg_offs, uint32_t value, AccessDetails &details);
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protected:
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// PCI configuration space state
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uint8_t max_lat = 0;
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uint8_t min_gnt = 0;
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uint16_t subsys_id = 0;
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uint16_t subsys_vndr = 0;
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};
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#endif /* PCI_DEVICE_H */
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