mirror of
https://github.com/dingusdev/dingusppc.git
synced 2024-11-18 22:05:51 +00:00
983e278498
All opcodes should be emulated now. There was also a significant amount of clean-up, particularly with lscbx and the bit rotation/shifting instructions.
539 lines
15 KiB
C++
539 lines
15 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-20 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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// The Power-specific opcodes for the processor - ppcopcodes.cpp
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// Any shared opcodes are in ppcopcodes.cpp
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#include "ppcemu.h"
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#include "ppcmmu.h"
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#include <array>
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#include <cmath>
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#include <iostream>
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#include <limits>
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#include <stdexcept>
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#include <stdio.h>
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#include <loguru.hpp>
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// Affects the XER register's SO and OV Bits
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inline void power_setsoov(uint32_t a, uint32_t b, uint32_t d) {
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if ((a ^ b) & (a ^ d) & 0x80000000UL) {
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ppc_state.spr[SPR::XER] |= 0xC0000000UL;
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} else {
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ppc_state.spr[SPR::XER] &= 0xBFFFFFFFUL;
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}
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}
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/** mask generator for rotate and shift instructions (§ 4.2.1.4 PowerpC PEM) */
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static inline uint32_t power_rot_mask(unsigned rot_mb, unsigned rot_me) {
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uint32_t m1 = 0xFFFFFFFFUL >> rot_mb;
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uint32_t m2 = 0xFFFFFFFFUL << (31 - rot_me);
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return ((rot_mb <= rot_me) ? m2 & m1 : m1 | m2);
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}
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void dppc_interpreter::power_abs() {
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ppc_grab_regsda();
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if (ppc_result_a == 0x80000000) {
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ppc_result_d = ppc_result_a;
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if (oe_flag)
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ppc_state.spr[SPR::XER] |= 0xC0000000;
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} else {
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ppc_result_d = ppc_result_a & 0x7FFFFFFF;
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}
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if (rc_flag)
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ppc_changecrf0(ppc_result_d);
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ppc_store_result_regd();
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}
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void dppc_interpreter::power_clcs() {
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ppc_grab_regsda();
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switch (reg_a) {
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case 12: //instruction cache line size
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case 13: //data cache line size
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case 14: //minimum line size
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case 15: //maximum line size
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ppc_result_d = 64;
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break;
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default:
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ppc_result_d = 0;
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}
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ppc_store_result_regd();
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}
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void dppc_interpreter::power_div() {
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ppc_grab_regsdab();
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ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
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ppc_state.spr[SPR::MQ] = (ppc_result_a | ppc_state.spr[SPR::MQ]) % ppc_result_b;
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if (oe_flag)
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power_setsoov(ppc_result_b, ppc_result_a, ppc_result_d);
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if (rc_flag)
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ppc_changecrf0(ppc_result_d);
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ppc_store_result_regd();
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}
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void dppc_interpreter::power_divs() {
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ppc_grab_regsdab();
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ppc_result_d = ppc_result_a / ppc_result_b;
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ppc_state.spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
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if (oe_flag)
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power_setsoov(ppc_result_b, ppc_result_a, ppc_result_d);
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if (rc_flag)
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ppc_changecrf0(ppc_result_d);
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ppc_store_result_regd();
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}
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void dppc_interpreter::power_doz() {
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ppc_grab_regsdab();
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if (((int32_t)ppc_result_a) > ((int32_t)ppc_result_b)) {
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ppc_result_d = 0;
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} else {
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ppc_result_d = ppc_result_b - ppc_result_a;
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}
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if (rc_flag)
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ppc_changecrf0(ppc_result_d);
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if (oe_flag)
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power_setsoov(ppc_result_a, ppc_result_b, ppc_result_d);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_dozi() {
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ppc_grab_regsdasimm();
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if (((int32_t)ppc_result_a) > simm) {
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ppc_result_d = 0;
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} else {
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ppc_result_d = simm - ppc_result_a;
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}
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_lscbx() {
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ppc_grab_regsdab();
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ppc_effective_address = (reg_a == 0) ? ppc_result_b : ppc_result_a + ppc_result_b;
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uint8_t return_value = 0;
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uint32_t bytes_to_load = (ppc_state.spr[SPR::XER] & 0x7f);
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uint32_t bytes_copied = 0;
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uint8_t matching_byte = (uint8_t)((ppc_state.spr[SPR::XER] & 0xFF00) >> 8);
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uint32_t byte_offset = 0;
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//for storing each byte
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uint32_t bitmask = 0;
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uint32_t shift_amount = 0;
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while (bytes_to_load > 0) {
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if (byte_offset == 24) {
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reg_d = (reg_d + 1) % 32;
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ppc_result_d = 0xFFFFFFFF;
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ppc_store_result_regd();
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}
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switch (byte_offset) {
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case 0:
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bitmask = 0x00FFFFFF;
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shift_amount = 24;
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break;
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case 8:
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bitmask = 0xFF00FFFF;
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shift_amount = 16;
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break;
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case 16:
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bitmask = 0xFFFF00FF;
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shift_amount = 8;
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break;
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case 24:
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bitmask = 0xFFFFFF00;
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shift_amount = 0;
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break;
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}
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return_value = mmu_read_vmem<uint8_t>(ppc_effective_address);
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// return_value = mem_grab_byte(ppc_effective_address);
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ppc_result_d = (ppc_result_d & bitmask) | (return_value << shift_amount);
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ppc_store_result_regd();
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bytes_copied++;
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if (return_value == matching_byte) {
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//Match has been found - Time to break out
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break;
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}
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byte_offset += 8;
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if (byte_offset == 32) {
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byte_offset = 0;
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}
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ppc_effective_address++;
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bytes_to_load--;
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}
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ppc_state.spr[SPR::XER] = (ppc_state.spr[SPR::XER] & 0xFFFFFF80) | bytes_copied;
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if (rc_flag)
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ppc_changecrf0(ppc_result_d);
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}
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void dppc_interpreter::power_maskg() {
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ppc_grab_regssab();
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uint32_t mask_start = ppc_result_d & 31;
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uint32_t mask_end = ppc_result_b & 31;
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uint32_t insert_mask = 0;
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if (mask_start < (mask_end + 1)) {
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insert_mask = power_rot_mask(mask_start, mask_end);
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}
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else if (mask_start == (mask_end + 1)) {
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insert_mask = 0xFFFFFFFF;
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}
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else {
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insert_mask = ~(power_rot_mask(mask_end + 1, mask_start - 1));
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}
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ppc_result_a = insert_mask;
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if (rc_flag)
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ppc_changecrf0(ppc_result_d);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_maskir() {
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ppc_grab_regssab();
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ppc_result_a = (ppc_result_d & ppc_result_b) | (~(ppc_result_b) & ppc_result_a);
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_mul() {
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ppc_grab_regsdab();
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uint64_t product;
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product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
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ppc_result_d = ((uint32_t)(product >> 32));
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ppc_state.spr[SPR::MQ] = ((uint32_t)(product));
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if (rc_flag)
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ppc_changecrf0(ppc_result_d);
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ppc_store_result_regd();
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}
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void dppc_interpreter::power_nabs() {
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ppc_grab_regsda();
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ppc_result_d = (0x80000000 | ppc_result_a);
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if (rc_flag)
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ppc_changecrf0(ppc_result_d);
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ppc_store_result_regd();
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}
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void dppc_interpreter::power_rlmi() {
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ppc_grab_regssab();
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unsigned rot_mb = (ppc_cur_instruction >> 6) & 31;
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unsigned rot_me = (ppc_cur_instruction >> 1) & 31;
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unsigned rot_sh = ppc_result_b & 31;
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uint32_t r = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
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uint32_t mask = power_rot_mask(rot_mb, rot_me);
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ppc_result_a = ((r & mask) | (ppc_result_a & ~mask));
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_rrib() {
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ppc_grab_regssab();
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if (ppc_result_d & 0x80000000) {
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ppc_result_a |= ((ppc_result_d & 0x80000000) >> ppc_result_b);
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} else {
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ppc_result_a &= ~((ppc_result_d & 0x80000000) >> ppc_result_b);
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}
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_sle() {
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ppc_grab_regssab();
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unsigned rot_sh = ppc_result_b & 31;
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ppc_result_a = ppc_result_d << rot_sh;
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ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
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ppc_store_result_rega();
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_sleq() {
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ppc_grab_regssab();
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unsigned rot_sh = ppc_result_b & 31;
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uint32_t r = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
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uint32_t mask = power_rot_mask(0, 31 - rot_sh);
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ppc_result_a = ((r & mask) | (ppc_state.spr[SPR::MQ] & ~mask));
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ppc_state.spr[SPR::MQ] = r;
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_sliq() {
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ppc_grab_regssa();
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unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
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ppc_result_a = ppc_result_d << rot_sh;
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ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_slliq() {
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ppc_grab_regssa();
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unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
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uint32_t r = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
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uint32_t mask = power_rot_mask(0, 31 - rot_sh);
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ppc_result_a = ((r & mask) | (ppc_state.spr[SPR::MQ] & ~mask));
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ppc_state.spr[SPR::MQ] = r;
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_sllq() {
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ppc_grab_regssab();
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unsigned rot_sh = ppc_result_b & 31;
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uint32_t r = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
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uint32_t mask = power_rot_mask(0, 31 - rot_sh);
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if (ppc_result_b >= 0x20) {
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ppc_result_a = (ppc_state.spr[SPR::MQ] & mask);
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}
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else {
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ppc_result_a = ((r & mask) | (ppc_state.spr[SPR::MQ] & ~mask));
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}
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_slq() {
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ppc_grab_regssab();
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unsigned rot_sh = ppc_result_b & 31;
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if (ppc_result_b >= 0x20) {
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ppc_result_a = ppc_result_d << rot_sh;
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} else {
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ppc_result_a = 0;
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}
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
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}
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void dppc_interpreter::power_sraiq() {
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ppc_grab_regssa();
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unsigned rot_sh = (ppc_cur_instruction >> 11) & 0x1F;
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uint32_t mask = (1 << rot_sh) - 1;
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ppc_result_a = (int32_t)ppc_result_d >> rot_sh;
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ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
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if ((ppc_result_d & 0x80000000UL) && (ppc_result_d & mask)) {
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ppc_state.spr[SPR::XER] |= 0x20000000UL;
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} else {
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ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
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}
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_sraq() {
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ppc_grab_regssab();
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unsigned rot_sh = ppc_result_b & 0x1F;
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uint32_t mask = (1 << rot_sh) - 1;
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ppc_result_a = (int32_t)ppc_result_d >> rot_sh;
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ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
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if ((ppc_result_d & 0x80000000UL) && (ppc_result_d & mask)) {
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ppc_state.spr[SPR::XER] |= 0x20000000UL;
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} else {
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ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
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}
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ppc_state.spr[SPR::MQ] = ((ppc_result_d << ppc_result_b) | (ppc_result_d >> (ppc_result_b)));
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_sre() {
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ppc_grab_regssab();
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unsigned rot_sh = ppc_result_b & 31;
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ppc_result_a = ppc_result_d >> rot_sh;
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ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_srea() {
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ppc_grab_regssab();
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unsigned rot_sh = ppc_result_b & 0x1F;
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ppc_result_a = (int32_t)ppc_result_d >> rot_sh;
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ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
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if ((ppc_result_d & 0x80000000UL) && (ppc_result_d & rot_sh)) {
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ppc_state.spr[SPR::XER] |= 0x20000000UL;
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} else {
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ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
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}
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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ppc_store_result_rega();
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}
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void dppc_interpreter::power_sreq() {
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ppc_grab_regssab();
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unsigned rot_sh = ppc_result_b & 31;
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unsigned mask = power_rot_mask(rot_sh, 31);
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ppc_result_a = ((rot_sh & mask) | (ppc_state.spr[SPR::MQ] & ~mask));
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ppc_state.spr[SPR::MQ] = rot_sh;
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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|
|
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ppc_store_result_rega();
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}
|
|
|
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void dppc_interpreter::power_sriq() {
|
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ppc_grab_regssa();
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unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
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ppc_result_a = ppc_result_d >> rot_sh;
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ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (rot_sh)));
|
|
|
|
if (rc_flag)
|
|
ppc_changecrf0(ppc_result_a);
|
|
|
|
ppc_store_result_rega();
|
|
}
|
|
|
|
void dppc_interpreter::power_srliq() {
|
|
ppc_grab_regssa();
|
|
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
|
|
|
|
uint32_t r = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
|
|
unsigned mask = power_rot_mask(rot_sh, 31);
|
|
|
|
ppc_result_a = ((r & mask) | (ppc_state.spr[SPR::MQ] & ~mask));
|
|
ppc_state.spr[SPR::MQ] = r;
|
|
|
|
if (rc_flag)
|
|
ppc_changecrf0(ppc_result_a);
|
|
|
|
ppc_store_result_rega();
|
|
}
|
|
|
|
void dppc_interpreter::power_srlq() {
|
|
ppc_grab_regssab();
|
|
unsigned rot_sh = ppc_result_b & 31;
|
|
uint32_t r = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
|
|
unsigned mask = power_rot_mask(rot_sh, 31);
|
|
|
|
if (ppc_result_b >= 0x20) {
|
|
ppc_result_a = (ppc_state.spr[SPR::MQ] & mask);
|
|
}
|
|
else {
|
|
ppc_result_a = ((r & mask) | (ppc_state.spr[SPR::MQ] & ~mask));
|
|
}
|
|
|
|
if (rc_flag)
|
|
ppc_changecrf0(ppc_result_a);
|
|
|
|
ppc_store_result_rega();
|
|
}
|
|
|
|
void dppc_interpreter::power_srq() {
|
|
ppc_grab_regssab();
|
|
unsigned rot_sh = ppc_result_b & 31;
|
|
|
|
if (ppc_result_b >= 0x20) {
|
|
ppc_result_a = 0;
|
|
} else {
|
|
ppc_result_a = ppc_result_d >> rot_sh;
|
|
}
|
|
|
|
ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
|
|
|
|
if (rc_flag)
|
|
ppc_changecrf0(ppc_result_a);
|
|
|
|
ppc_store_result_rega();
|
|
}
|