mirror of
https://github.com/dingusdev/dingusppc.git
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Result of running IWYU (https://include-what-you-use.org/) and applying most of the suggestions about unncessary includes and forward declarations. Was motivated by observing that <thread> was being included in ppcopcodes.cpp even though it was unused (found while researching the use of threads), but seems generally good to help with build times and correctness.
182 lines
5.6 KiB
C++
182 lines
5.6 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-22 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef PCI_HOST_H
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#define PCI_HOST_H
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#include <core/bitops.h>
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#include <endianswap.h>
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#include <cinttypes>
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#include <string>
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#include <unordered_map>
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#include <vector>
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enum {
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PCI_CONFIG_DIRECTION = 1,
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PCI_CONFIG_READ = 0,
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PCI_CONFIG_WRITE = 1,
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PCI_CONFIG_TYPE = 4,
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PCI_CONFIG_TYPE_0 = 0,
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PCI_CONFIG_TYPE_1 = 4,
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};
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/** PCI config space access details */
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typedef struct AccessDetails {
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uint8_t size;
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uint8_t offset;
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uint8_t flags;
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} AccessDetails;
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#define DEV_FUN(dev_num,fun_num) (((dev_num) << 3) | (fun_num))
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class PCIDevice;
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class PCIBridge;
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class PCIHost {
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public:
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PCIHost() {
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this->dev_map.clear();
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io_space_devs.clear();
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};
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~PCIHost() = default;
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virtual bool pci_register_device(int dev_fun_num, PCIDevice* dev_instance);
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virtual bool pci_register_mmio_region(uint32_t start_addr, uint32_t size, PCIDevice* obj);
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virtual bool pci_unregister_mmio_region(uint32_t start_addr, uint32_t size, PCIDevice* obj);
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virtual void attach_pci_device(const std::string& dev_name, int slot_id);
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PCIDevice *attach_pci_device(const std::string& dev_name, int slot_id,
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const std::string& dev_suffix);
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virtual bool pci_io_read_loop (uint32_t offset, int size, uint32_t &res);
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virtual bool pci_io_write_loop(uint32_t offset, int size, uint32_t value);
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virtual uint32_t pci_io_read_broadcast (uint32_t offset, int size);
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virtual void pci_io_write_broadcast(uint32_t offset, int size, uint32_t value);
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virtual PCIDevice *pci_find_device(uint8_t bus_num, uint8_t dev_num, uint8_t fun_num);
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virtual uint32_t pci_t1_read(uint8_t dev, uint32_t fun, uint32_t reg, AccessDetails &details) {
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return 0;
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};
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virtual void pci_t1_write(uint8_t dev, uint32_t fun, uint32_t reg, uint32_t value,
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AccessDetails &details) {};
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protected:
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std::unordered_map<int, PCIDevice*> dev_map;
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std::vector<PCIDevice*> io_space_devs;
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std::vector<PCIBridge*> bridge_devs;
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};
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// Helpers for data conversion in the PCI Configuration space.
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/**
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Perform size dependent endian swapping for value that is dword from PCI config.
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Unaligned data is handled properly by wrapping around if needed.
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*/
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inline uint32_t pci_conv_rd_data(uint32_t value, AccessDetails &details) {
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switch (details.size << 2 | details.offset) {
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// Bytes
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case 0x04:
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return value & 0xFF; // 0
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case 0x05:
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return (value >> 8) & 0xFF; // 1
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case 0x06:
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return (value >> 16) & 0xFF; // 2
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case 0x07:
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return (value >> 24) & 0xFF; // 3
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// Words
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case 0x08:
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return BYTESWAP_16(value); // 0 1
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case 0x09:
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return BYTESWAP_16((value >> 8) & 0xFFFFU); // 1 2
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case 0x0A:
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return BYTESWAP_16((value >> 16) & 0xFFFFU); // 2 3
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case 0x0B:
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return ((value >> 16) & 0xFF00) | (value & 0xFF); // 3 0
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// Dwords
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case 0x10:
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return BYTESWAP_32(value); // 0 1 2 3
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case 0x11:
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return ROTL_32(BYTESWAP_32(value), 8); // 1 2 3 0
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case 0x12:
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return ROTL_32(BYTESWAP_32(value), 16); // 2 3 0 1
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case 0x13:
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return ROTR_32(BYTESWAP_32(value), 8); // 3 0 1 2
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default:
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return 0xFFFFFFFFUL;
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}
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}
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/**
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Perform size dependent endian swapping for v2, then merge v2 with v1 under
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control of a mask generated according with the size parameter.
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Unaligned data is handled properly by wrapping around if needed.
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*/
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inline uint32_t pci_conv_wr_data(uint32_t v1, uint32_t v2, AccessDetails &details)
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{
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switch (details.size << 2 | details.offset) {
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// Bytes
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case 0x04:
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return (v1 & ~0xFF) | (v2 & 0xFF); // 3 2 1 d0
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case 0x05:
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return (v1 & ~0xFF00) | ((v2 & 0xFF) << 8); // 3 2 d0 0
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case 0x06:
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return (v1 & ~0xFF0000) | ((v2 & 0xFF) << 16); // 3 d0 1 0
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case 0x07:
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return (v1 & 0x00FFFFFF) | ((v2 & 0xFF) << 24); // d0 2 1 0
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// Words
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case 0x08:
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return (v1 & ~0xFFFF) | BYTESWAP_16(v2); // 3 2 d1 d0
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case 0x09:
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return (v1 & ~0xFFFF00) | (BYTESWAP_16(v2) << 8); // 3 d1 d0 0
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case 0x0a:
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return (v1 & 0x0000FFFF) | (BYTESWAP_16(v2) << 16); // d1 d0 1 0
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case 0x0b:
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return (v1 & 0x00FFFF00) | ((v2 & 0xFF00) << 16) |
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(v2 & 0xFF); // d0 2 1 d1
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// Dwords
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case 0x10:
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return BYTESWAP_32(v2); // d3 d2 d1 d0
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case 0x11:
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return ROTL_32(BYTESWAP_32(v2), 8); // d2 d1 d0 d3
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case 0x12:
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return ROTL_32(BYTESWAP_32(v2), 16); // d1 d0 d3 d2
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case 0x13:
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return ROTR_32(BYTESWAP_32(v2), 8); // d0 d3 d2 d1
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default:
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return 0xFFFFFFFFUL;
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}
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}
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#endif /* PCI_HOST_H */
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