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https://github.com/dingusdev/dingusppc.git
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503ee92528
Tests in Open Firmware confirm that writing to CURSOR_POS_LO will change the cursor position even if a write to CURSOR_POS_HI doesn't happen.
125 lines
4.6 KiB
C++
125 lines
4.6 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-24 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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/** Definitions for the Apple RAMDAC ASICs (RaDACal & DACula). */
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#ifndef APPLE_RAMDAC_H
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#define APPLE_RAMDAC_H
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#include <devices/common/hwcomponent.h>
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#include <devices/ioctrl/macio.h>
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#include <cinttypes>
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#include <functional>
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enum DacFlavour {
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RADACAL,
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DACULA,
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};
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#define DACULA_VENDOR_SIERRA 0x3C // 14.3 MHz
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#define DACULA_VENDOR_ATT 0x84 // 15 MHz
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constexpr auto VIDEO_XTAL = 14318180.0f; // external crystal oscillator frequency
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namespace RamdacRegs {
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enum RamdacRegs : uint8_t {
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ADDRESS = 0, // address register
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CURSOR_CLUT = 1, // cursor palette data
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MULTI = 2, // multipurpose section
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CLUT_DATA = 3, // color palette data
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// multipurpose section registers (both RaDACal & DACula)
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CURSOR_POS_HI = 0x10, // cursor position, high-order byte
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CURSOR_POS_LO = 0x11, // cursor position, low-order byte
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MISC_CTRL = 0x20, // miscellaneus control bits ; Dacula: read ; when 1MB VRAM then write (mode&15) else write (mode)
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DBL_BUF_CTRL = 0x21, // double buffer control bits ; Dacula: write 4; Radical: set to 0 if using optional bank (bankb) in Open Firmware or for 2nd page in ndrv
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TEST_CTRL = 0x22, // enable/disable DAC tests ; Dacula: write 0
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// multipurpose section registers (DACula only)
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PLL_CTRL = 0x23, // phase locked loop control ; Dacula: if read 2 then write 3 else write 2 <-
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VIDCLK_M_SET_A = 0x24, // M parameter for the set A ; Dacula: N2 for 2
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VIDCLK_PN_SET_A = 0x25, // P & N parameters for the set A ; Dacula: D2 for 2
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// = 0x26, // Dacula: write 0xc6 before changing the clock
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VIDCLK_M_SET_B = 0x27, // M parameter for the set B ; Dacula: N2 for 3 <-
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VIDCLK_PN_SET_B = 0x28, // P & N parameters for the set B ; Dacula: D2 for 3 <-
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DAC_29 = 0x29, // Dacula: linux writes 0xa6 after changing the clock ; macrom writes 0xc6
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VENDOR_ID = 0x40, // Dacula: DAC_TYPE 0x3c or 0x84
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};
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}; // namespace RamdacRegs
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typedef std::function<void(uint8_t index, uint8_t *colors)> GetClutEntryCallback;
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typedef std::function<void(uint8_t index, uint8_t *colors)> SetClutEntryCallback;
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typedef std::function<void(bool cursor_on)> CursorCtrlCallback;
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class AppleRamdac : public HWComponent, public IobusDevice {
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public:
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AppleRamdac(DacFlavour flavour);
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~AppleRamdac() = default;
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uint16_t iodev_read(uint32_t address);
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void iodev_write(uint32_t address, uint16_t value);
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int get_clock_div();
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int get_pix_width();
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int get_dot_freq();
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uint8_t get_dbl_buf_cr() { return dbl_buf_cr; }
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void set_fb_parameters(int width, int height, uint32_t pitch) {
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this->video_width = width;
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this->video_height = height;
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this->fb_pitch = pitch;
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};
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void measure_hw_cursor(uint8_t *fb_ptr);
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void draw_hw_cursor(uint8_t *src_buf, uint8_t *dst_buf, int dst_pitch);
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GetClutEntryCallback get_clut_entry_cb = nullptr;
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SetClutEntryCallback set_clut_entry_cb = nullptr;
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CursorCtrlCallback cursor_ctrl_cb = nullptr;
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protected:
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DacFlavour flavour;
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uint8_t dac_addr = 0;
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uint8_t dac_cr = 0;
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uint8_t dbl_buf_cr = 0;
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uint8_t tst_cr = 0;
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uint16_t cursor_xpos = 0; // horizontal position of the cursor region
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uint16_t cursor_ypos = 0;
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uint16_t cursor_height = 0;
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uint8_t cursor_pos_lo = 0;
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uint8_t clk_m[2] = {};
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uint8_t clk_pn[2] = {};
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uint8_t pll_cr = 0;
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uint8_t dac_vendor = DACULA_VENDOR_SIERRA;
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uint8_t comp_index = 0;
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uint8_t clut_color[3] = {};
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uint32_t cursor_clut[8] = {};
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int video_width = 0;
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int video_height = 0;
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uint32_t fb_pitch = 0;
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uint32_t cursor_timer_id = 0;
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};
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#endif // APPLE_RAMDAC_H
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