dingusppc/devices/common/pci/pcihost.cpp
joevt be45a6a020 Add PCI bridge and multi-function device support.
Add PCI bridge and multi-function device support.
Overview:
- A multi-function device is two or more PCIDevices with the same device number but one device is function zero (as with currently implemented PCIDevices) and the other functions have function numbers between 1 and 7. The device number and function number are properties of the PCIDevice's parent PCIHost connection.
- A PCIBridge is a PCIHost (it can connect child PCI devices) and a PCIDevice (it has config space, BARs, and expansion ROM).
- A PCIDevice has Type 0 header. It has 6 BARs.
- A PCIBridge has Type 1 header. It has 2 BARs. The config space registers beginning from offset 0x18 differ from those of a PCIDevice.

Possible future modifications:
- Add a PCICardBus class. It is a PCIHost. It has Type 2 header. It has one BAR. The first 20 bytes match Type 0 and Type 1 headers. These exist in New World Macs. They allow hot-plug of PCI devices.
- Split base PCI registers (first 16 bytes) into a PCIBase class. Type 1 and 2 have two or one BAR but I think all 6 BARs belong in PCIBase class anyway.
- Split PCIHost into two classes: Currently existing PCIHosts (Bandit, Grackle) are PCIHost and PCIRoot (they have the broadcast I/O requests functionality) while PCIBridge is PCIHost only - it can propagate I/O requests but does not originate the broadcast.
- pci_register_mmio_region should maybe return a pointer to a region struct so that it can be used for unregistering or modifying the region's range. This may be useful for PCI bridges which have ranges that may constrain memory BARs of their downstream devices.

PCIDevice
- Moved expansion ROM BAR handling to a separate function pci_wr_exp_rom_bar so that it can be used by both PCI devices and PCI bridges which have the ROM BAR in different locations. It now supports unmapping expansion ROM. Also made exp_rom_bar not writable if there's no ROM.
- Added num_bars field which specifies the number of valid BARs since Type 0, 1, and 2 headers have different number of BARs.
- map_exp_rom_mem now properly unmaps expansion ROM (using new function unmap_exp_rom_mem) before mapping it again.
- Added function set_multi_function which modifies hdr_type to indicate if a device has other functions. This is to be applied only to devices with function number 0.

PCIHost
- When attaching a PCI device, it will check if it's a multi-function device (there exists an attached function that is not zero) and adjust hdr_type of function 0 of the device accordingly.
- Attached PCI bridges are added to a list of PCI bridges attached to the host.
- Added pci_io_read_loop and pci_io_write_loop which loop through attached PCI devices to find one that will perform the action for the given I/O address without logging an error (since some other device might perform the action).
- Added pci_io_read_broadcast and pci_io_write_broadcast which are used by a PCI root (bandit/grackle). They will log an error if the action is not performed. They should probably do a machine check exception to match real Power Macs.
- pci_find_device (used by PCI root) will recursively find a PCIDevice for type 1 config register accesses.
- Logging from PCIHost now includes the name of the PCIHost instead of just "PCIHost" because there can be multiple PCI hosts.

PCIBridge
- Sets num_bars to 2 and hdr_type to 1.
- I/O ranges set in the config registers are handled correctly by pci_io_read and pci_io_write.
- Memory ranges set in the config registers do not currently affect memory mmio regions. It is assumed that Open Firmware and the OS will set the ranges and BARs correctly to allow all BARs to be accessed fully.

bandit, mpc106
- Bandit and Grackle now call pci_io_read_broadcast and pci_io_read_broadcast to pass I/O accesses to downstream PCI devices.
- Chaos is modified to work like Bandit even though it will never have PCI bridges attached or devices that support I/O accesses. It's simpler this way.
2023-02-05 07:17:28 -08:00

179 lines
5.9 KiB
C++

/*
DingusPPC - The Experimental PowerPC Macintosh emulator
Copyright (C) 2018-22 divingkatae and maximum
(theweirdo) spatium
(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <https://www.gnu.org/licenses/>.
*/
#include <devices/common/hwcomponent.h>
#include <devices/common/pci/pcibridge.h>
#include <devices/common/pci/pcihost.h>
#include <devices/memctrl/memctrlbase.h>
#include <machines/machinebase.h>
#include <endianswap.h>
#include <loguru.hpp>
#include <cinttypes>
bool PCIHost::pci_register_device(int dev_fun_num, PCIDevice* dev_instance)
{
// return false if dev_fun_num already registered
if (this->dev_map.count(dev_fun_num))
return false;
int fun_num = dev_fun_num & 7;
int dev_num = (dev_fun_num >> 3) & 0x1f;
bool is_multi_function = fun_num != 0;
for (int other_fun_num = 0; other_fun_num < 8; other_fun_num++) {
if (this->dev_map.count(DEV_FUN(dev_num, other_fun_num))) {
is_multi_function = true;
if (is_multi_function && other_fun_num == 0) {
this->dev_map[DEV_FUN(dev_num, other_fun_num)]->set_multi_function(true);
}
}
}
this->dev_map[dev_fun_num] = dev_instance;
dev_instance->set_host(this);
if (is_multi_function && fun_num == 0) {
dev_instance->set_multi_function(true);
}
if (dev_instance->supports_io_space()) {
this->io_space_devs.push_back(dev_instance);
}
PCIBridge *bridge = dynamic_cast<PCIBridge*>(dev_instance);
if (bridge) {
this->bridge_devs.push_back(bridge);
}
return true;
}
bool PCIHost::pci_register_mmio_region(uint32_t start_addr, uint32_t size, PCIDevice* obj)
{
MemCtrlBase *mem_ctrl = dynamic_cast<MemCtrlBase *>
(gMachineObj->get_comp_by_type(HWCompType::MEM_CTRL));
// FIXME: add sanity checks!
return mem_ctrl->add_mmio_region(start_addr, size, obj);
}
bool PCIHost::pci_unregister_mmio_region(uint32_t start_addr, uint32_t size, PCIDevice* obj)
{
MemCtrlBase *mem_ctrl = dynamic_cast<MemCtrlBase *>
(gMachineObj->get_comp_by_type(HWCompType::MEM_CTRL));
// FIXME: add sanity checks!
return mem_ctrl->remove_mmio_region(start_addr, size, obj);
}
void PCIHost::attach_pci_device(std::string& dev_name, int slot_id)
{
if (!DeviceRegistry::device_registered(dev_name)) {
LOG_F(WARNING, "PCIHost: specified PCI device %s doesn't exist", dev_name.c_str());
return;
}
// attempt to create device object
auto dev_obj = DeviceRegistry::get_descriptor(dev_name).m_create_func();
if (!dev_obj->supports_type(HWCompType::PCI_DEV)) {
LOG_F(WARNING, "PCIHost: cannot attach non-PCI device %s", dev_name.c_str());
return;
}
// add device to the machine object
gMachineObj->add_device(dev_name, std::move(dev_obj));
// register device with the PCI host
this->pci_register_device(
slot_id, dynamic_cast<PCIDevice*>(gMachineObj->get_comp_by_name(dev_name)));
}
bool PCIHost::pci_io_read_loop(uint32_t offset, int size, uint32_t &res)
{
for (auto& dev : this->io_space_devs) {
if (dev->pci_io_read(offset, size, &res)) {
return true;
}
}
return false;
}
bool PCIHost::pci_io_write_loop(uint32_t offset, int size, uint32_t value)
{
for (auto& dev : this->io_space_devs) {
if (dev->pci_io_write(offset, value, size)) {
return true;
}
}
return false;
}
uint32_t PCIHost::pci_io_read_broadcast(uint32_t offset, int size)
{
uint32_t res;
// broadcast I/O request to devices that support I/O space
// until a device returns true that means "request accepted"
if (pci_io_read_loop (offset, size, res)) {
return res;
}
HWComponent *hwc = dynamic_cast<HWComponent*>(this);
LOG_F(
ERROR, "%s: Attempt to read from unmapped PCI I/O space @%08x.%c",
hwc ? hwc->get_name().c_str() : "PCIHost", offset,
size == 4 ? 'l' : size == 2 ? 'w' : size == 1 ? 'b' : '0' + size
);
// FIXME: add machine check exception (DEFAULT CATCH!, code=FFF00200)
return 0;
}
void PCIHost::pci_io_write_broadcast(uint32_t offset, int size, uint32_t value)
{
// broadcast I/O request to devices that support I/O space
// until a device returns true that means "request accepted"
if (pci_io_write_loop(offset, size, value)) {
return;
}
HWComponent *hwc = dynamic_cast<HWComponent*>(this);
LOG_F(
ERROR, "%s: Attempt to write to unmapped PCI I/O space @%08x.%c = %0*x",
hwc ? hwc->get_name().c_str() : "PCIHost", offset,
size == 4 ? 'l' : size == 2 ? 'w' : size == 1 ? 'b' : '0' + size,
size * 2, BYTESWAP_SIZED(value, size)
);
}
PCIDevice *PCIHost::pci_find_device(uint8_t bus_num, uint8_t dev_num, uint8_t fun_num)
{
for (auto& bridge : this->bridge_devs) {
if (bridge->secondary_bus <= bus_num) {
if (bridge->secondary_bus == bus_num) {
if (bridge->dev_map.count(DEV_FUN(dev_num, fun_num))) {
return bridge->dev_map[DEV_FUN(dev_num, fun_num)];
}
}
else if (bridge->subordinate_bus >= bus_num) {
return bridge->pci_find_device(bus_num, dev_num, fun_num);
}
}
}
return NULL;
}