mirror of
https://github.com/dingusdev/dingusppc.git
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250 lines
8.8 KiB
C
250 lines
8.8 KiB
C
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-24 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef PPC_MACROS_H
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#define PPC_MACROS_H
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#include <cinttypes>
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#include "ppcemu.h"
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#define ppc_set_cr(entry) \
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ppc_state.cr |= entry;
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#define ppc_unset_cr(entry) \
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ppc_state.cr &= ~entry;
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#define ppc_get_xer \
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return ppc_state.spr[SPR::XER];
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#define ppc_set_xer(entry) \
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ppc_state.spr[SPR::XER] |= entry;
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#define ppc_unset_xer(entry) \
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ppc_state.spr[SPR::XER] &= ~entry;
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#define power_store_mq(entry) \
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ppc_state.spr[SPR::MQ] = entry;
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#define ppc_grab_regsdasimm(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int32_t simm = int32_t(int16_t(opcode)); \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a];
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#define ppc_grab_regsdauimm(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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uint32_t uimm = uint16_t(opcode); \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a];
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#define ppc_grab_regsasimm(opcode) \
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int reg_a = (opcode >> 16) & 31; \
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int32_t simm = int32_t(int16_t(opcode)); \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a];
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#define ppc_grab_regssauimm(opcode) \
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int reg_s = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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uint32_t uimm = uint16_t(opcode); \
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uint32_t ppc_result_d = ppc_state.gpr[reg_s]; \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a];
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#define ppc_grab_crfd_regsauimm(opcode) \
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int crf_d = (opcode >> 21) & 0x1C; \
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int reg_a = (opcode >> 16) & 31; \
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uint32_t uimm = uint16_t(opcode); \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a];
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#define ppc_grab_crfds(opcode) \
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int crf_d = (instr >> 21) & 0x1C; \
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int crf_s = (instr >> 16) & 0x1C;
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#define ppc_grab_da(opcode)\
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int reg_d = (opcode >> 21) & 31;\
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int reg_a = (opcode >> 16) & 31;\
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#define ppc_grab_dab(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int reg_b = (opcode >> 11) & 31;
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#define ppc_grab_s(opcode) \
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int reg_s = (opcode >> 21) & 31; \
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uint32_t ppc_result_d = ppc_state.gpr[reg_s];
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#define ppc_grab_regsdab(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int reg_b = (opcode >> 11) & 31; \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a]; \
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uint32_t ppc_result_b = ppc_state.gpr[reg_b];
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#define ppc_grab_regssab(opcode) \
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int reg_s = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int reg_b = (opcode >> 11) & 31; \
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uint32_t ppc_result_d = ppc_state.gpr[reg_s]; \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a]; \
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uint32_t ppc_result_b = ppc_state.gpr[reg_b];
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#define ppc_grab_regssab_stswx(opcode) \
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int reg_s = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int reg_b = (opcode >> 11) & 31; \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a]; \
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uint32_t ppc_result_b = ppc_state.gpr[reg_b];
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#define ppc_grab_regsab(opcode) \
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int reg_a = (opcode >> 16) & 31;\
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int reg_b = (opcode >> 11) & 31;\
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uint32_t ppc_result_a = ppc_state.gpr[reg_a];\
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uint32_t ppc_result_b = ppc_state.gpr[reg_b];
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#define ppc_grab_regssa(opcode) \
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int reg_s = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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uint32_t ppc_result_d = ppc_state.gpr[reg_s]; \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a];
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#define ppc_grab_regssa_stmw(opcode) \
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int reg_s = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a];
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#define ppc_grab_regssash(opcode) \
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int reg_s = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int rot_sh = (opcode >> 11) & 31; \
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uint32_t ppc_result_d = ppc_state.gpr[reg_s]; \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a];
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#define ppc_grab_regssash_stswi(opcode) \
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int reg_s = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int rot_sh = (opcode >> 11) & 31; \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a];
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#define ppc_grab_regssb(opcode) \
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int reg_s = (opcode >> 21) & 31; \
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int reg_b = (opcode >> 11) & 31; \
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uint32_t ppc_result_d = ppc_state.gpr[reg_s]; \
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uint32_t ppc_result_b = ppc_state.gpr[reg_b];
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#define ppc_grab_regsda(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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uint32_t reg_a = (opcode >> 16) & 31; \
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uint32_t ppc_result_a = ppc_state.gpr[reg_a];
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#define ppc_grab_regsdb(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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uint32_t reg_b = (opcode >> 11) & 31; \
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uint32_t ppc_result_b = ppc_state.gpr[reg_b];
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#define ppc_store_iresult_reg(reg, ppc_result) \
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ppc_state.gpr[reg] = ppc_result;
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#define ppc_store_sfpresult_int(reg, ppc_result64_d)\
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ppc_state.fpr[(reg)].int64_r = ppc_result64_d;
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#define ppc_store_sfpresult_flt(reg, ppc_dblresult64_d)\
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ppc_state.fpr[(reg)].dbl64_r = ppc_dblresult64_d;
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#define ppc_store_dfpresult_int(reg, ppc_result64_d)\
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ppc_state.fpr[(reg)].int64_r = ppc_result64_d;
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#define ppc_store_dfpresult_flt(reg, ppc_dblresult64_d)\
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ppc_state.fpr[(reg)].dbl64_r = ppc_dblresult64_d;
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#define ppc_grab_regsfpdb(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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int reg_b = (opcode >> 11) & 31;
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#define GET_FPR(reg) \
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ppc_state.fpr[(reg)].dbl64_r
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#define ppc_grab_regsfpdiab(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int reg_b = (opcode >> 11) & 31; \
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uint32_t val_reg_a = ppc_state.gpr[reg_a]; \
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uint32_t val_reg_b = ppc_state.gpr[reg_b];
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#define ppc_grab_regsfpdia(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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uint32_t val_reg_a = ppc_state.gpr[reg_a];
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#define ppc_grab_regsfpsia(opcode) \
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int reg_s = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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uint32_t val_reg_a = ppc_state.gpr[reg_a];
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#define ppc_grab_regsfpsiab(opcode) \
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int reg_s = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int reg_b = (opcode >> 11) & 31; \
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uint32_t val_reg_a = ppc_state.gpr[reg_a]; \
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uint32_t val_reg_b = ppc_state.gpr[reg_b];
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#define ppc_grab_regsfpsab(opcode) \
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int reg_a = (opcode >> 16) & 31; \
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int reg_b = (opcode >> 11) & 31; \
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int crf_d = (opcode >> 21) & 0x1C; \
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double db_test_a = GET_FPR(reg_a); \
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double db_test_b = GET_FPR(reg_b);
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#define ppc_grab_regsfpdab(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int reg_b = (opcode >> 11) & 31; \
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double val_reg_a = GET_FPR(reg_a); \
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double val_reg_b = GET_FPR(reg_b);
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#define ppc_grab_regsfpdac(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int reg_c = (opcode >> 6) & 31; \
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double val_reg_a = GET_FPR(reg_a); \
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double val_reg_c = GET_FPR(reg_c);
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#define ppc_grab_regsfpdabc(opcode) \
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int reg_d = (opcode >> 21) & 31; \
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int reg_a = (opcode >> 16) & 31; \
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int reg_b = (opcode >> 11) & 31; \
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int reg_c = (opcode >> 6) & 31; \
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double val_reg_a = GET_FPR(reg_a); \
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double val_reg_b = GET_FPR(reg_b); \
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double val_reg_c = GET_FPR(reg_c);
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#define ppc_grab_mtfsf(opcode) \
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int reg_b = (opcode >> 11) & 0x1F; \
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uint8_t fm = (opcode >> 17) & 0xFF;
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#define ppc_grab_mtfsfi(opcode) \
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int crf_d = (opcode >> 21) & 0x1C; \
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uint32_t imm = (opcode << 16) & 0xF0000000UL;
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#define ppc_grab_crfd(opcode) \
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int crf_d = (opcode >> 21) & 0x1C;
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#endif // PPC_MACROS_H
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