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Avoid the use of floating-point when loading/storing from/to memory. This
could have caused some rounding thus alterations to integer registers on context switches when lfd/stfd instructions were used. e.g. cygwin compilers defaulted to i686 code generation and exhibed this behaviour, you could also see this behavior with -march=i586 -mtune=pentiumpro. GCC is perfectly right to do those optimizations.
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@ -171,7 +171,7 @@ void OPPROTO op_load_F##REG##_FPR##N(void) \
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} \
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void OPPROTO op_store_F##REG##_FPR##N(void) \
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{ \
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CPU->fpr(N) = F##REG; \
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CPU->fpr_dw(N) = F##REG##_dw; \
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}
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#define DEFINE_REG(N) \
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DEFINE_OP(0,N); \
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@ -179,7 +179,7 @@ DEFINE_OP(1,N); \
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DEFINE_OP(2,N); \
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void OPPROTO op_store_FD_FPR##N(void) \
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{ \
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CPU->fpr(N) = FD; \
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CPU->fpr_dw(N) = FD_dw; \
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}
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DEFINE_REG(0);
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@ -423,9 +423,6 @@ void OPPROTO op_mtcrf_T0_im(void)
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#ifndef do_fsub
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#define do_fsub(x, y) (x) - (y)
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#endif
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#ifndef do_fmov
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#define do_fmov(x) (x)
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#endif
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/**
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@ -438,15 +435,15 @@ void OPPROTO op_##NAME(void) \
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CODE; \
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}
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DEFINE_OP(fmov_F0_F1, F0 = F1);
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DEFINE_OP(fmov_F0_F2, F0 = F2);
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DEFINE_OP(fmov_F1_F0, F1 = F0);
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DEFINE_OP(fmov_F1_F2, F1 = F2);
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DEFINE_OP(fmov_F2_F0, F2 = F0);
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DEFINE_OP(fmov_F2_F1, F2 = F1);
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DEFINE_OP(fmov_FD_F0, FD = F0);
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DEFINE_OP(fmov_FD_F1, FD = F1);
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DEFINE_OP(fmov_FD_F2, FD = F2);
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DEFINE_OP(fmov_F0_F1, F0_dw = F1_dw);
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DEFINE_OP(fmov_F0_F2, F0_dw = F2_dw);
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DEFINE_OP(fmov_F1_F0, F1_dw = F0_dw);
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DEFINE_OP(fmov_F1_F2, F1_dw = F2_dw);
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DEFINE_OP(fmov_F2_F0, F2_dw = F0_dw);
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DEFINE_OP(fmov_F2_F1, F2_dw = F1_dw);
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DEFINE_OP(fmov_FD_F0, FD_dw = F0_dw);
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DEFINE_OP(fmov_FD_F1, FD_dw = F1_dw);
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DEFINE_OP(fmov_FD_F2, FD_dw = F2_dw);
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DEFINE_OP(fabs_FD_F0, FD = do_fabs(F0));
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DEFINE_OP(fneg_FD_F0, FD = do_fneg(F0));
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@ -37,12 +37,6 @@
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#include "mon_disass.h"
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#endif
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// Disable dynamic translation for floating-point load/store of doubles?
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// XXX: could this due to some rounding while processing these?
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#ifdef _WIN32
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#define DISABLE_FP_DOUBLE_LOAD_STORE 1
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#endif
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// Define to enable const branches optimization
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#define FOLLOW_CONST_JUMPS 1
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@ -1109,7 +1103,6 @@ powerpc_cpu::compile_block(uint32 entry_point)
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dg.gen_store_T0_crf(crfD_field::extract(opcode));
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break;
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}
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#ifndef DISABLE_FP_DOUBLE_LOAD_STORE
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case PPC_I(LFD): // Load Floating-Point Double
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op.mem.size = 8;
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op.mem.do_update = 0;
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@ -1130,7 +1123,6 @@ powerpc_cpu::compile_block(uint32 entry_point)
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op.mem.do_update = 0;
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op.mem.do_indexed = 1;
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goto do_fp_load;
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#endif
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case PPC_I(LFS): // Load Floating-Point Single
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op.mem.size = 4;
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op.mem.do_update = 0;
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@ -1191,7 +1183,6 @@ powerpc_cpu::compile_block(uint32 entry_point)
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}
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break;
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}
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#ifndef DISABLE_FP_DOUBLE_LOAD_STORE
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case PPC_I(STFD): // Store Floating-Point Double
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op.mem.size = 8;
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op.mem.do_update = 0;
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@ -1212,7 +1203,6 @@ powerpc_cpu::compile_block(uint32 entry_point)
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op.mem.do_update = 0;
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op.mem.do_indexed = 1;
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goto do_fp_store;
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#endif
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case PPC_I(STFS): // Store Floating-Point Single
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op.mem.size = 4;
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op.mem.do_update = 0;
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