diff --git a/BasiliskII/src/AmigaOS/asm_support.asm b/BasiliskII/src/AmigaOS/asm_support.asm
index 07af0005..eb8def12 100644
--- a/BasiliskII/src/AmigaOS/asm_support.asm
+++ b/BasiliskII/src/AmigaOS/asm_support.asm
@@ -47,7 +47,6 @@
 		XREF	_MainTask
 		XREF	_SysBase
 		XREF	_quit_emulator
-		XREF	_kprintf
 
 		SECTION	text,CODE
 
@@ -296,14 +295,14 @@ _TrapHandlerAsm:
 		cmp.l	#47,(sp)
 		ble	doTrapXX		; Vector 32-47 : TRAP #0 - 15 Instruction Vectors
 
-1$:		move.l	_OldTrapHandler,-(sp)	;No, jump to old trap handler
+1$		move.l	_OldTrapHandler,-(sp)	;No, jump to old trap handler
 		rts
 
 *
 * TRAP #0 - 15 Instruction Vectors
 *
 
-doTrapXX:	move.l	a0,(sp)			;Save a0
+doTrapXX	move.l	a0,(sp)			;Save a0
 		move.l	usp,a0			;Get user stack pointer
 		move.l	2*4(sp),-(a0)		;Copy 4-word stack frame to user stack
 		move.l	1*4(sp),-(a0)
@@ -321,7 +320,7 @@ doTrapXX:	move.l	a0,(sp)			;Save a0
 * trace Vector
 *
 
-dotrace:	move.l	a0,(sp)			;Save a0
+dotrace		move.l	a0,(sp)			;Save a0
 
 		move.l	usp,a0			;Get user stack pointer
 		move.l	3*4(sp),-(a0)		;Copy 6-word stack frame to user stack
@@ -351,32 +350,14 @@ doaline		move.l	a0,(sp)			;Save a0
 		addq.l	#8,sp			;Remove exception frame from supervisor stack
 		andi	#$d8ff,sr		;Switch to user mode, enable interrupts
 
-	IFNE	0
-
-;		move.w	([2,sp]),($3800)
-
-		cmp.w	#$a9c3,([2,sp])
-		bne	1$
-
-		move.l	d0,-(sp)
-		move.l	a0,-(sp)
-		pea	afmt(pc)
-		jsr	_kprintf
-		lea	3*4(sp),sp
-1$:
-	ENDC
-
 		move.l	$28.w,-(sp)		;Jump to MacOS exception handler
 		rts
 
-afmt:		dc.b	'a0=%08lx  d0=%08lx\n',0
-		cnop	0,4
-
 *
 * Illegal address handler
 *
 
-doilladdr:	move.l	a0,(sp)			;Save a0
+doilladdr	move.l	a0,(sp)			;Save a0
 
 		move.l	usp,a0			;Get user stack pointer
 		move.l	3*4(sp),-(a0)		;Copy 6-word stack frame to user stack
@@ -397,8 +378,7 @@ doilladdr:	move.l	a0,(sp)			;Save a0
 *   to execute extended opcodes (see emul_op.h)
 *
 
-doillinstr
-		movem.l	a0/d0,-(sp)
+doillinstr	movem.l	a0/d0,-(sp)
 		move.w	([6+2*4,sp]),d0
 		and.w	#$ff00,d0
 		cmp.w	#$7100,d0
@@ -418,8 +398,7 @@ doillinstr
 		move.l	$10.w,-(sp)		;Jump to MacOS exception handler
 		rts
 
-1$:
-		move.l	a6,(sp)			;Save a6
+1$		move.l	a6,(sp)			;Save a6
 		move.l	usp,a6			;Get user stack pointer
 
 		move.l	a6,-10(a6)		;Push USP (a7)
@@ -717,7 +696,7 @@ frestorea5	move.l	(sp),d0			;Restore d0
 		rte
 
 ; fsave xxx(a5) +jl+
-fsavea5:	move.l	(sp),d0			;Restore d0
+fsavea5		move.l	(sp),d0			;Restore d0
 		move.l	a0,(sp)			;Save a0
 		move.l	a5,a0			;Get base register
 		add.w	([6,sp],2),a0		;Add offset to base register
@@ -746,8 +725,8 @@ pvrte		movem.l	a0/a1,-(sp)		;Save a0 and a1
 		lea	16+4(sp),a1		; destination address (in supervisor stack)
 		bra	1$
 
-2$:		move.w	(a0)+,(a1)+		; copy additional stack words back to supervisor stack
-1$:		dbf	d0,2$
+2$		move.w	(a0)+,(a1)+		; copy additional stack words back to supervisor stack
+1$		dbf	d0,2$
 
 		move.l	a0,usp			;Update USP
 		movem.l	(sp)+,a0/a1		;Restore a0 and a1
@@ -951,23 +930,23 @@ movectcd1	move.l	(sp)+,d0		;Restore d0
 		rte
 
 ; movec sfc,d1	+jl+
-movecsfcd1:	move.l	(sp)+,d0		;Restore d0
+movecsfcd1	move.l	(sp)+,d0		;Restore d0
 		moveq	#0,d1
 		addq.l	#4,2(sp)
 		rte
 
 ; movec dfc,d1	+jl+
-movecdfcd1:	move.l	(sp)+,d0		;Restore d0
+movecdfcd1	move.l	(sp)+,d0		;Restore d0
 		moveq	#0,d1
 		addq.l	#4,2(sp)
 		rte
 
-movecurpd0:		; movec urp,d0	+jl+
-movecsrpd0:		; movec srp,d0
-movecitt0d0:		; movec itt0,d0
-movecitt1d0:		; movec itt1,d0
-movecdtt0d0:		; movec dtt0,d0
-movecdtt1d0:		; movec dtt1,d0
+movecurpd0		; movec urp,d0	+jl+
+movecsrpd0		; movec srp,d0
+movecitt0d0		; movec itt0,d0
+movecitt1d0		; movec itt1,d0
+movecdtt0d0		; movec dtt0,d0
+movecdtt1d0		; movec dtt1,d0
 		addq.l	#4,sp
 		moveq.l	#0,d0			;MMU is always off
 		addq.l	#4,2(sp)		;skip instruction
@@ -1022,19 +1001,19 @@ cpushadcic	movem.l	d1/a0-a1/a6,-(sp)	;Clear caches
 		rte
 
 ; move usp,a1	+jl+
-moveuspa1:	move.l	(sp)+,d0
+moveuspa1	move.l	(sp)+,d0
 		move	usp,a1
 		addq.l	#2,2(sp)
 		rte
 
 ; move usp,a0	+jl+
-moveuspa0:	move.l	(sp)+,d0
+moveuspa0	move.l	(sp)+,d0
 		move	usp,a0
 		addq.l	#2,2(sp)
 		rte
 
 ; move a1,usp	+jl+
-moved1usp:	move.l	(sp)+,d0
+moved1usp	move.l	(sp)+,d0
 		move	a1,usp
 		addq.l	#2,2(sp)
 		rte
@@ -1043,8 +1022,7 @@ moved1usp:	move.l	(sp)+,d0
 ; Trigger NMI (Pop up debugger)
 ;
 
-_AsmTriggerNMI:
-		move.l	d0,-(sp)		;Save d0
+_AsmTriggerNMI	move.l	d0,-(sp)		;Save d0
 		move.w	#$007c,-(sp)		;Yes, fake NMI stack frame
 		pea	1$
 		move.w	_EmulatedSR,d0
diff --git a/BasiliskII/src/Unix/main_unix.cpp b/BasiliskII/src/Unix/main_unix.cpp
index 033a19b3..9f2293d6 100644
--- a/BasiliskII/src/Unix/main_unix.cpp
+++ b/BasiliskII/src/Unix/main_unix.cpp
@@ -421,7 +421,7 @@ int main(int argc, char **argv)
 		printf("WARNING: Cannot detect CPU type, assuming 68020\n");
 		CPUType = 2;
 	}
-	FPUType = 0;	//!!
+	FPUType = 1;	// NetBSD has an FPU emulation, so the FPU ought to be available at all times
 	TwentyFourBitAddressing = false;
 #endif
 
@@ -946,7 +946,7 @@ static void sigill_handler(int sig, int code, struct sigcontext *scp)
 
 #define STORE_SR(v) \
 	scp->sc_ps = (v) & 0xff; \
-	EmulatedSR = (v) & 0x2700; \
+	EmulatedSR = (v) & 0xe700; \
 	if (((v) & 0x0700) == 0 && InterruptFlags) \
 		TriggerInterrupt();
 
@@ -1009,7 +1009,7 @@ static void sigill_handler(int sig, int code, struct sigcontext *scp)
 		case 0x007c: {	// ori #xxxx,sr
 			uint16 sr = GET_SR | pc[1];
 			scp->sc_ps = sr & 0xff;		// oring bits into the sr can't enable interrupts, so we don't need to call STORE_SR
-			EmulatedSR = sr & 0x2700;
+			EmulatedSR = sr & 0xe700;
 			INC_PC(4);
 			break;
 		}
@@ -1086,31 +1086,49 @@ static void sigill_handler(int sig, int code, struct sigcontext *scp)
 		}
 
 		case 0xf327:	// fsave -(sp)
-			goto ill;	//!!
+			if (CPUIs68060) {
+				regs->a[7] -= 4;
+				WriteMacInt32(regs->a[7], 0x60000000);	// Idle frame
+				regs->a[7] -= 4;
+				WriteMacInt32(regs->a[7], 0);
+				regs->a[7] -= 4;
+				WriteMacInt32(regs->a[7], 0);
+			} else {
+				regs->a[7] -= 4;
+				WriteMacInt32(regs->a[7], 0x41000000);	// Idle frame
+			}
+			scp->sc_sp = regs->a[7];
+			INC_PC(2);
+			break;
 
 		case 0xf35f:	// frestore (sp)+
-			goto ill;	//!!
+			if (CPUIs68060)
+				regs->a[7] += 12;
+			else
+				regs->a[7] += 4;
+			scp->sc_sp = regs->a[7];
+			INC_PC(2);
+			break;
 
-		case 0x4e73: {	// rte (only handles format 0)
+		case 0x4e73: {	// rte
 			uint32 a7 = regs->a[7];
 			uint16 sr = ReadMacInt16(a7);
 			a7 += 2;
 			scp->sc_ps = sr & 0xff;
-			EmulatedSR = sr & 0x2700;
+			EmulatedSR = sr & 0xe700;
 			scp->sc_pc = ReadMacInt32(a7);
-			a7 += 6;
-			scp->sc_sp = regs->a[7] = a7;
+			a7 += 4;
+			uint16 format = ReadMacInt16(a7) >> 12;
+			a7 += 2;
+			static const int frame_adj[16] = {
+				0, 0, 4, 4, 8, 0, 0, 52, 50, 12, 24, 84, 16, 0, 0, 0
+			};
+			scp->sc_sp = regs->a[7] = a7 + frame_adj[format];
 			break;
 		}
 
 		case 0x4e7a:	// movec cr,x
 			switch (pc[1]) {
-				case 0x8801:	// movec vbr,a0
-					regs->a[0] = 0;
-					break;
-				case 0x9801:	// movec vbr,a1
-					regs->a[1] = 0;
-					break;
 				case 0x0002:	// movec cacr,d0
 					regs->d[0] = 0x3111;
 					break;
@@ -1118,11 +1136,26 @@ static void sigill_handler(int sig, int code, struct sigcontext *scp)
 					regs->d[1] = 0x3111;
 					break;
 				case 0x0003:	// movec tc,d0
+				case 0x0004:	// movec itt0,d0
+				case 0x0005:	// movec itt1,d0
+				case 0x0006:	// movec dtt0,d0
+				case 0x0007:	// movec dtt1,d0
+				case 0x0806:	// movec urp,d0
+				case 0x0807:	// movec srp,d0
 					regs->d[0] = 0;
 					break;
+				case 0x1000:	// movec sfc,d1
+				case 0x1001:	// movec dfc,d1
 				case 0x1003:	// movec tc,d1
+				case 0x1801:	// movec vbr,d1
 					regs->d[1] = 0;
 					break;
+				case 0x8801:	// movec vbr,a0
+					regs->a[0] = 0;
+					break;
+				case 0x9801:	// movec vbr,a1
+					regs->a[1] = 0;
+					break;
 				default:
 					goto ill;
 			}
@@ -1131,7 +1164,10 @@ static void sigill_handler(int sig, int code, struct sigcontext *scp)
 
 		case 0x4e7b:	// movec x,cr
 			switch (pc[1]) {
+				case 0x1000:	// movec d1,sfc
+				case 0x1001:	// movec d1,dfc
 				case 0x0801:	// movec d0,vbr
+				case 0x1801:	// movec d1,vbr
 					break;
 				case 0x0002:	// movec d0,cacr
 				case 0x1002:	// movec d1,cacr