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Fix build with gcc4 on x86-64: ignore errors when casting pointers to int

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from regs & fpu members + code cache. This is possible because data is
allocated in 32-bit space and we force allocation of translation cache to
those bounds too.
This commit is contained in:
gbeauche 2005-04-24 23:00:08 +00:00
parent 1853c38130
commit 165b32da39
3 changed files with 103 additions and 100 deletions
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8
BasiliskII/src/uae_cpu/compiler/codegen_x86.h
View File

@ -243,10 +243,10 @@ typedef unsigned short _us;
typedef signed int _sl; typedef signed int _sl;
typedef unsigned int _ul; typedef unsigned int _ul;
#define _UC(X) ((_uc )(X)) #define _UC(X) ((_uc )(unsigned long)(X))
#define _US(X) ((_us )(X)) #define _US(X) ((_us )(unsigned long)(X))
#define _SL(X) ((_sl )(X)) #define _SL(X) ((_sl )(unsigned long)(X))
#define _UL(X) ((_ul )(X)) #define _UL(X) ((_ul )(unsigned long)(X))
# define _PUC(X) ((_uc *)(X)) # define _PUC(X) ((_uc *)(X))
# define _PUS(X) ((_us *)(X)) # define _PUS(X) ((_us *)(X))

173
BasiliskII/src/uae_cpu/compiler/compemu_fpp.cpp
View File

@ -92,7 +92,7 @@ static void fpuop_illg(uae_u32 opcode, uae_u32 extra)
op_illg(opcode); op_illg(opcode);
} }
uae_s32 temp_fp[4]; /* To convert between FP/integer */ static uae_s32 temp_fp[4]; /* To convert between FP/integer */
/* return register number, or -1 for failure */ /* return register number, or -1 for failure */
STATIC_INLINE int get_fp_value (uae_u32 opcode, uae_u16 extra) STATIC_INLINE int get_fp_value (uae_u32 opcode, uae_u16 extra)
@ -119,25 +119,25 @@ STATIC_INLINE int get_fp_value (uae_u32 opcode, uae_u16 extra)
switch (size) { switch (size) {
case 6: case 6:
sign_extend_8_rr(S1,reg); sign_extend_8_rr(S1,reg);
mov_l_mr((uae_u32)temp_fp,S1); mov_l_mr((uintptr)temp_fp,S1);
delay2; delay2;
fmovi_rm(FS1,(uae_u32)temp_fp); fmovi_rm(FS1,(uintptr)temp_fp);
return FS1; return FS1;
case 4: case 4:
sign_extend_16_rr(S1,reg); sign_extend_16_rr(S1,reg);
mov_l_mr((uae_u32)temp_fp,S1); mov_l_mr((uintptr)temp_fp,S1);
delay2; delay2;
fmovi_rm(FS1,(uae_u32)temp_fp); fmovi_rm(FS1,(uintptr)temp_fp);
return FS1; return FS1;
case 0: case 0:
mov_l_mr((uae_u32)temp_fp,reg); mov_l_mr((uintptr)temp_fp,reg);
delay2; delay2;
fmovi_rm(FS1,(uae_u32)temp_fp); fmovi_rm(FS1,(uintptr)temp_fp);
return FS1; return FS1;
case 1: case 1:
mov_l_mr((uae_u32)temp_fp,reg); mov_l_mr((uintptr)temp_fp,reg);
delay2; delay2;
fmovs_rm(FS1,(uae_u32)temp_fp); fmovs_rm(FS1,(uintptr)temp_fp);
return FS1; return FS1;
default: default:
return -1; return -1;
@ -248,52 +248,52 @@ STATIC_INLINE int get_fp_value (uae_u32 opcode, uae_u16 extra)
switch (size) { switch (size) {
case 0: case 0:
readlong(ad,S2,S3); readlong(ad,S2,S3);
mov_l_mr((uae_u32)temp_fp,S2); mov_l_mr((uintptr)temp_fp,S2);
delay2; delay2;
fmovi_rm(FS1,(uae_u32)temp_fp); fmovi_rm(FS1,(uintptr)temp_fp);
break; break;
case 1: case 1:
readlong(ad,S2,S3); readlong(ad,S2,S3);
mov_l_mr((uae_u32)temp_fp,S2); mov_l_mr((uintptr)temp_fp,S2);
delay2; delay2;
fmovs_rm(FS1,(uae_u32)temp_fp); fmovs_rm(FS1,(uintptr)temp_fp);
break; break;
case 2: case 2:
readword(ad,S2,S3); readword(ad,S2,S3);
mov_w_mr(((uae_u32)temp_fp)+8,S2); mov_w_mr(((uintptr)temp_fp)+8,S2);
add_l_ri(ad,4); add_l_ri(ad,4);
readlong(ad,S2,S3); readlong(ad,S2,S3);
mov_l_mr((uae_u32)(temp_fp)+4,S2); mov_l_mr((uintptr)(temp_fp)+4,S2);
add_l_ri(ad,4); add_l_ri(ad,4);
readlong(ad,S2,S3); readlong(ad,S2,S3);
mov_l_mr((uae_u32)(temp_fp),S2); mov_l_mr((uintptr)(temp_fp),S2);
delay2; delay2;
fmov_ext_rm(FS1,(uae_u32)(temp_fp)); fmov_ext_rm(FS1,(uintptr)(temp_fp));
break; break;
case 3: case 3:
return -1; /* Some silly "packed" stuff */ return -1; /* Some silly "packed" stuff */
case 4: case 4:
readword(ad,S2,S3); readword(ad,S2,S3);
sign_extend_16_rr(S2,S2); sign_extend_16_rr(S2,S2);
mov_l_mr((uae_u32)temp_fp,S2); mov_l_mr((uintptr)temp_fp,S2);
delay2; delay2;
fmovi_rm(FS1,(uae_u32)temp_fp); fmovi_rm(FS1,(uintptr)temp_fp);
break; break;
case 5: case 5:
readlong(ad,S2,S3); readlong(ad,S2,S3);
mov_l_mr(((uae_u32)temp_fp)+4,S2); mov_l_mr(((uintptr)temp_fp)+4,S2);
add_l_ri(ad,4); add_l_ri(ad,4);
readlong(ad,S2,S3); readlong(ad,S2,S3);
mov_l_mr((uae_u32)(temp_fp),S2); mov_l_mr((uintptr)(temp_fp),S2);
delay2; delay2;
fmov_rm(FS1,(uae_u32)(temp_fp)); fmov_rm(FS1,(uintptr)(temp_fp));
break; break;
case 6: case 6:
readbyte(ad,S2,S3); readbyte(ad,S2,S3);
sign_extend_8_rr(S2,S2); sign_extend_8_rr(S2,S2);
mov_l_mr((uae_u32)temp_fp,S2); mov_l_mr((uintptr)temp_fp,S2);
delay2; delay2;
fmovi_rm(FS1,(uae_u32)temp_fp); fmovi_rm(FS1,(uintptr)temp_fp);
break; break;
default: default:
return -1; return -1;
@ -329,24 +329,24 @@ STATIC_INLINE int put_fp_value (int val, uae_u32 opcode, uae_u16 extra)
case 0: case 0:
switch (size) { switch (size) {
case 6: case 6:
fmovi_mr((uae_u32)temp_fp,val); fmovi_mr((uintptr)temp_fp,val);
delay; delay;
mov_b_rm(reg,(uae_u32)temp_fp); mov_b_rm(reg,(uintptr)temp_fp);
return 0; return 0;
case 4: case 4:
fmovi_mr((uae_u32)temp_fp,val); fmovi_mr((uintptr)temp_fp,val);
delay; delay;
mov_w_rm(reg,(uae_u32)temp_fp); mov_w_rm(reg,(uintptr)temp_fp);
return 0; return 0;
case 0: case 0:
fmovi_mr((uae_u32)temp_fp,val); fmovi_mr((uintptr)temp_fp,val);
delay; delay;
mov_l_rm(reg,(uae_u32)temp_fp); mov_l_rm(reg,(uintptr)temp_fp);
return 0; return 0;
case 1: case 1:
fmovs_mr((uae_u32)temp_fp,val); fmovs_mr((uintptr)temp_fp,val);
delay; delay;
mov_l_rm(reg,(uae_u32)temp_fp); mov_l_rm(reg,(uintptr)temp_fp);
return 0; return 0;
default: default:
return -1; return -1;
@ -447,50 +447,50 @@ STATIC_INLINE int put_fp_value (int val, uae_u32 opcode, uae_u16 extra)
} }
switch (size) { switch (size) {
case 0: case 0:
fmovi_mr((uae_u32)temp_fp,val); fmovi_mr((uintptr)temp_fp,val);
delay; delay;
mov_l_rm(S2,(uae_u32)temp_fp); mov_l_rm(S2,(uintptr)temp_fp);
writelong_clobber(ad,S2,S3); writelong_clobber(ad,S2,S3);
break; break;
case 1: case 1:
fmovs_mr((uae_u32)temp_fp,val); fmovs_mr((uintptr)temp_fp,val);
delay; delay;
mov_l_rm(S2,(uae_u32)temp_fp); mov_l_rm(S2,(uintptr)temp_fp);
writelong_clobber(ad,S2,S3); writelong_clobber(ad,S2,S3);
break; break;
case 2: case 2:
fmov_ext_mr((uae_u32)temp_fp,val); fmov_ext_mr((uintptr)temp_fp,val);
delay; delay;
mov_w_rm(S2,(uae_u32)temp_fp+8); mov_w_rm(S2,(uintptr)temp_fp+8);
writeword_clobber(ad,S2,S3); writeword_clobber(ad,S2,S3);
add_l_ri(ad,4); add_l_ri(ad,4);
mov_l_rm(S2,(uae_u32)temp_fp+4); mov_l_rm(S2,(uintptr)temp_fp+4);
writelong_clobber(ad,S2,S3); writelong_clobber(ad,S2,S3);
add_l_ri(ad,4); add_l_ri(ad,4);
mov_l_rm(S2,(uae_u32)temp_fp); mov_l_rm(S2,(uintptr)temp_fp);
writelong_clobber(ad,S2,S3); writelong_clobber(ad,S2,S3);
break; break;
case 3: return -1; /* Packed */ case 3: return -1; /* Packed */
case 4: case 4:
fmovi_mr((uae_u32)temp_fp,val); fmovi_mr((uintptr)temp_fp,val);
delay; delay;
mov_l_rm(S2,(uae_u32)temp_fp); mov_l_rm(S2,(uintptr)temp_fp);
writeword_clobber(ad,S2,S3); writeword_clobber(ad,S2,S3);
break; break;
case 5: case 5:
fmov_mr((uae_u32)temp_fp,val); fmov_mr((uintptr)temp_fp,val);
delay; delay;
mov_l_rm(S2,(uae_u32)temp_fp+4); mov_l_rm(S2,(uintptr)temp_fp+4);
writelong_clobber(ad,S2,S3); writelong_clobber(ad,S2,S3);
add_l_ri(ad,4); add_l_ri(ad,4);
mov_l_rm(S2,(uae_u32)temp_fp); mov_l_rm(S2,(uintptr)temp_fp);
writelong_clobber(ad,S2,S3); writelong_clobber(ad,S2,S3);
break; break;
case 6: case 6:
fmovi_mr((uae_u32)temp_fp,val); fmovi_mr((uintptr)temp_fp,val);
delay; delay;
mov_l_rm(S2,(uae_u32)temp_fp); mov_l_rm(S2,(uintptr)temp_fp);
writebyte(ad,S2,S3); writebyte(ad,S2,S3);
break; break;
default: default:
@ -648,6 +648,9 @@ void comp_fbcc_opp (uae_u32 opcode)
uae_u32 nh; uae_u32 nh;
int cc; int cc;
// comp_pc_p is expected to be bound to 32-bit addresses
assert((uintptr)comp_pc_p <= 0xffffffffUL);
if (opcode&0x20) { /* only cc from 00 to 1f are defined */ if (opcode&0x20) { /* only cc from 00 to 1f are defined */
FAIL(1); FAIL(1);
return; return;
@ -658,9 +661,9 @@ void comp_fbcc_opp (uae_u32 opcode)
else { else {
off=comp_get_ilong((m68k_pc_offset+=4)-4); off=comp_get_ilong((m68k_pc_offset+=4)-4);
} }
mov_l_ri(S1,(uae_u32) mov_l_ri(S1,(uintptr)
(comp_pc_p+off-(m68k_pc_offset-start_68k_offset))); (comp_pc_p+off-(m68k_pc_offset-start_68k_offset)));
mov_l_ri(PC_P,(uae_u32)comp_pc_p); mov_l_ri(PC_P,(uintptr)comp_pc_p);
/* Now they are both constant. Might as well fold in m68k_pc_offset */ /* Now they are both constant. Might as well fold in m68k_pc_offset */
add_l_ri(S1,m68k_pc_offset); add_l_ri(S1,m68k_pc_offset);
@ -1004,16 +1007,16 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
if (incr < 0) { /* Predecrement */ if (incr < 0) { /* Predecrement */
for (reg = 7; reg >= 0; reg--) { for (reg = 7; reg >= 0; reg--) {
if (list & 0x80) { if (list & 0x80) {
fmov_ext_mr((uae_u32)temp_fp,reg); fmov_ext_mr((uintptr)temp_fp,reg);
delay; delay;
sub_l_ri(ad,4); sub_l_ri(ad,4);
mov_l_rm(S2,(uae_u32)temp_fp); mov_l_rm(S2,(uintptr)temp_fp);
writelong_clobber(ad,S2,S3); writelong_clobber(ad,S2,S3);
sub_l_ri(ad,4); sub_l_ri(ad,4);
mov_l_rm(S2,(uae_u32)temp_fp+4); mov_l_rm(S2,(uintptr)temp_fp+4);
writelong_clobber(ad,S2,S3); writelong_clobber(ad,S2,S3);
sub_l_ri(ad,4); sub_l_ri(ad,4);
mov_w_rm(S2,(uae_u32)temp_fp+8); mov_w_rm(S2,(uintptr)temp_fp+8);
writeword_clobber(ad,S2,S3); writeword_clobber(ad,S2,S3);
} }
list <<= 1; list <<= 1;
@ -1022,15 +1025,15 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
else { /* Postincrement */ else { /* Postincrement */
for (reg = 0; reg < 8; reg++) { for (reg = 0; reg < 8; reg++) {
if (list & 0x80) { if (list & 0x80) {
fmov_ext_mr((uae_u32)temp_fp,reg); fmov_ext_mr((uintptr)temp_fp,reg);
delay; delay;
mov_w_rm(S2,(uae_u32)temp_fp+8); mov_w_rm(S2,(uintptr)temp_fp+8);
writeword_clobber(ad,S2,S3); writeword_clobber(ad,S2,S3);
add_l_ri(ad,4); add_l_ri(ad,4);
mov_l_rm(S2,(uae_u32)temp_fp+4); mov_l_rm(S2,(uintptr)temp_fp+4);
writelong_clobber(ad,S2,S3); writelong_clobber(ad,S2,S3);
add_l_ri(ad,4); add_l_ri(ad,4);
mov_l_rm(S2,(uae_u32)temp_fp); mov_l_rm(S2,(uintptr)temp_fp);
writelong_clobber(ad,S2,S3); writelong_clobber(ad,S2,S3);
add_l_ri(ad,4); add_l_ri(ad,4);
} }
@ -1083,15 +1086,15 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
if (list & 0x80) { if (list & 0x80) {
sub_l_ri(ad,4); sub_l_ri(ad,4);
readlong(ad,S2,S3); readlong(ad,S2,S3);
mov_l_mr((uae_u32)(temp_fp),S2); mov_l_mr((uintptr)(temp_fp),S2);
sub_l_ri(ad,4); sub_l_ri(ad,4);
readlong(ad,S2,S3); readlong(ad,S2,S3);
mov_l_mr((uae_u32)(temp_fp)+4,S2); mov_l_mr((uintptr)(temp_fp)+4,S2);
sub_l_ri(ad,4); sub_l_ri(ad,4);
readword(ad,S2,S3); readword(ad,S2,S3);
mov_w_mr(((uae_u32)temp_fp)+8,S2); mov_w_mr(((uintptr)temp_fp)+8,S2);
delay2; delay2;
fmov_ext_rm(reg,(uae_u32)(temp_fp)); fmov_ext_rm(reg,(uintptr)(temp_fp));
} }
list <<= 1; list <<= 1;
} }
@ -1101,16 +1104,16 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
uae_u32 wrd1, wrd2, wrd3; uae_u32 wrd1, wrd2, wrd3;
if (list & 0x80) { if (list & 0x80) {
readword(ad,S2,S3); readword(ad,S2,S3);
mov_w_mr(((uae_u32)temp_fp)+8,S2); mov_w_mr(((uintptr)temp_fp)+8,S2);
add_l_ri(ad,4); add_l_ri(ad,4);
readlong(ad,S2,S3); readlong(ad,S2,S3);
mov_l_mr((uae_u32)(temp_fp)+4,S2); mov_l_mr((uintptr)(temp_fp)+4,S2);
add_l_ri(ad,4); add_l_ri(ad,4);
readlong(ad,S2,S3); readlong(ad,S2,S3);
mov_l_mr((uae_u32)(temp_fp),S2); mov_l_mr((uintptr)(temp_fp),S2);
add_l_ri(ad,4); add_l_ri(ad,4);
delay2; delay2;
fmov_ext_rm(reg,(uae_u32)(temp_fp)); fmov_ext_rm(reg,(uintptr)(temp_fp));
} }
list <<= 1; list <<= 1;
} }
@ -1129,8 +1132,8 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
if (extra & 0x2000) { if (extra & 0x2000) {
if (extra & 0x1000) { if (extra & 0x1000) {
#if HANDLE_FPCR #if HANDLE_FPCR
mov_l_rm(opcode & 15, (uae_u32)&fpu.fpcr.rounding_mode); mov_l_rm(opcode & 15, (uintptr)&fpu.fpcr.rounding_mode);
or_l_rm(opcode & 15, (uae_u32)&fpu.fpcr.rounding_precision); or_l_rm(opcode & 15, (uintptr)&fpu.fpcr.rounding_precision);
#else #else
FAIL(1); FAIL(1);
return; return;
@ -1141,7 +1144,7 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
return; return;
} }
if (extra & 0x0400) { if (extra & 0x0400) {
mov_l_rm(opcode & 15,(uae_u32)&fpu.instruction_address); mov_l_rm(opcode & 15,(uintptr)&fpu.instruction_address);
return; return;
} }
} else { } else {
@ -1161,8 +1164,8 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
mov_l_rr(S2,opcode & 15); mov_l_rr(S2,opcode & 15);
and_l_ri(S1,FPCR_ROUNDING_PRECISION); and_l_ri(S1,FPCR_ROUNDING_PRECISION);
and_l_ri(S2,FPCR_ROUNDING_MODE); and_l_ri(S2,FPCR_ROUNDING_MODE);
mov_l_mr((uae_u32)&fpu.fpcr.rounding_precision,S1); mov_l_mr((uintptr)&fpu.fpcr.rounding_precision,S1);
mov_l_mr((uae_u32)&fpu.fpcr.rounding_mode,S2); mov_l_mr((uintptr)&fpu.fpcr.rounding_mode,S2);
#else #else
FAIL(1); FAIL(1);
return; return;
@ -1170,7 +1173,7 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
// return; gb-- FMOVEM could also operate on fpiar // return; gb-- FMOVEM could also operate on fpiar
} }
if (extra & 0x0400) { if (extra & 0x0400) {
mov_l_mr((uae_u32)&fpu.instruction_address,opcode & 15); mov_l_mr((uintptr)&fpu.instruction_address,opcode & 15);
// return; gb-- we have to process all FMOVEM bits before returning // return; gb-- we have to process all FMOVEM bits before returning
} }
return; return;
@ -1189,13 +1192,13 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
FAIL(1); FAIL(1);
return; return;
#endif #endif
// mov_l_mi((uae_u32)&regs.fpcr,val); // mov_l_mi((uintptr)&regs.fpcr,val);
mov_l_ri(S1,val); mov_l_ri(S1,val);
mov_l_ri(S2,val); mov_l_ri(S2,val);
and_l_ri(S1,FPCR_ROUNDING_PRECISION); and_l_ri(S1,FPCR_ROUNDING_PRECISION);
and_l_ri(S2,FPCR_ROUNDING_MODE); and_l_ri(S2,FPCR_ROUNDING_MODE);
mov_l_mr((uae_u32)&fpu.fpcr.rounding_precision,S1); mov_l_mr((uintptr)&fpu.fpcr.rounding_precision,S1);
mov_l_mr((uae_u32)&fpu.fpcr.rounding_mode,S2); mov_l_mr((uintptr)&fpu.fpcr.rounding_mode,S2);
#else #else
FAIL(1); FAIL(1);
return; return;
@ -1204,7 +1207,7 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
} }
if (extra & 0x0400) { if (extra & 0x0400) {
uae_u32 val=comp_get_ilong((m68k_pc_offset+=4)-4); uae_u32 val=comp_get_ilong((m68k_pc_offset+=4)-4);
mov_l_mi((uae_u32)&fpu.instruction_address,val); mov_l_mi((uintptr)&fpu.instruction_address,val);
// return; gb-- we have to process all FMOVEM bits before returning // return; gb-- we have to process all FMOVEM bits before returning
} }
return; return;
@ -1234,9 +1237,9 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
break; break;
case 0x0c: case 0x0c:
#if USE_LONG_DOUBLE #if USE_LONG_DOUBLE
fmov_ext_rm(reg,(uae_u32)&const_e); fmov_ext_rm(reg,(uintptr)&const_e);
#else #else
fmov_rm(reg,(uae_u32)&const_e); fmov_rm(reg,(uintptr)&const_e);
#endif #endif
break; break;
case 0x0d: case 0x0d:
@ -1244,9 +1247,9 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
break; break;
case 0x0e: case 0x0e:
#if USE_LONG_DOUBLE #if USE_LONG_DOUBLE
fmov_ext_rm(reg,(uae_u32)&const_log10_e); fmov_ext_rm(reg,(uintptr)&const_log10_e);
#else #else
fmov_rm(reg,(uae_u32)&const_log10_e); fmov_rm(reg,(uintptr)&const_log10_e);
#endif #endif
break; break;
case 0x0f: case 0x0f:
@ -1257,9 +1260,9 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
break; break;
case 0x31: case 0x31:
#if USE_LONG_DOUBLE #if USE_LONG_DOUBLE
fmov_ext_rm(reg,(uae_u32)&const_loge_10); fmov_ext_rm(reg,(uintptr)&const_loge_10);
#else #else
fmov_rm(reg,(uae_u32)&const_loge_10); fmov_rm(reg,(uintptr)&const_loge_10);
#endif #endif
break; break;
case 0x32: case 0x32:
@ -1279,9 +1282,9 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
case 0x3d: case 0x3d:
case 0x3e: case 0x3e:
case 0x3f: case 0x3f:
fmov_ext_rm(reg,(uae_u32)(power10+(extra & 0x7f)-0x32)); fmov_ext_rm(reg,(uintptr)(power10+(extra & 0x7f)-0x32));
#else #else
fmov_rm(reg,(uae_u32)(power10+(extra & 0x7f)-0x32)); fmov_rm(reg,(uintptr)(power10+(extra & 0x7f)-0x32));
#endif #endif
break; break;
default: default:
@ -1330,9 +1333,9 @@ void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
frndint_rr(reg,src); frndint_rr(reg,src);
/* restore control word */ /* restore control word */
mov_l_rm(S1,(uae_u32)&regs.fpcr); mov_l_rm(S1,(uintptr)&regs.fpcr);
and_l_ri(S1,0x000000f0); and_l_ri(S1,0x000000f0);
fldcw_m_indexed(S1,(uae_u32)x86_fpucw); fldcw_m_indexed(S1,(uintptr)x86_fpucw);
MAKE_FPSR (reg); MAKE_FPSR (reg);
break; break;

22
BasiliskII/src/uae_cpu/compiler/gencomp.c
View File

@ -1549,9 +1549,9 @@ gen_opcode (unsigned long int opcode)
start_brace(); start_brace();
comprintf("\tint newad=scratchie++;\n" comprintf("\tint newad=scratchie++;\n"
"\treadlong(15,newad,scratchie);\n" "\treadlong(15,newad,scratchie);\n"
"\tmov_l_mr((uae_u32)&regs.pc,newad);\n" "\tmov_l_mr((uintptr)&regs.pc,newad);\n"
"\tget_n_addr_jmp(newad,PC_P,scratchie);\n" "\tget_n_addr_jmp(newad,PC_P,scratchie);\n"
"\tmov_l_mr((uae_u32)&regs.pc_oldp,PC_P);\n" "\tmov_l_mr((uintptr)&regs.pc_oldp,PC_P);\n"
"\tm68k_pc_offset=0;\n" "\tm68k_pc_offset=0;\n"
"\tadd_l(15,offs);\n"); "\tadd_l(15,offs);\n");
gen_update_next_handler(); gen_update_next_handler();
@ -1580,9 +1580,9 @@ gen_opcode (unsigned long int opcode)
case i_RTS: case i_RTS:
comprintf("\tint newad=scratchie++;\n" comprintf("\tint newad=scratchie++;\n"
"\treadlong(15,newad,scratchie);\n" "\treadlong(15,newad,scratchie);\n"
"\tmov_l_mr((uae_u32)&regs.pc,newad);\n" "\tmov_l_mr((uintptr)&regs.pc,newad);\n"
"\tget_n_addr_jmp(newad,PC_P,scratchie);\n" "\tget_n_addr_jmp(newad,PC_P,scratchie);\n"
"\tmov_l_mr((uae_u32)&regs.pc_oldp,PC_P);\n" "\tmov_l_mr((uintptr)&regs.pc_oldp,PC_P);\n"
"\tm68k_pc_offset=0;\n" "\tm68k_pc_offset=0;\n"
"\tlea_l_brr(15,15,4);\n"); "\tlea_l_brr(15,15,4);\n");
gen_update_next_handler(); gen_update_next_handler();
@ -1605,18 +1605,18 @@ gen_opcode (unsigned long int opcode)
"\tmov_l_ri(ret,retadd);\n" "\tmov_l_ri(ret,retadd);\n"
"\tsub_l_ri(15,4);\n" "\tsub_l_ri(15,4);\n"
"\twritelong_clobber(15,ret,scratchie);\n"); "\twritelong_clobber(15,ret,scratchie);\n");
comprintf("\tmov_l_mr((uae_u32)&regs.pc,srca);\n" comprintf("\tmov_l_mr((uintptr)&regs.pc,srca);\n"
"\tget_n_addr_jmp(srca,PC_P,scratchie);\n" "\tget_n_addr_jmp(srca,PC_P,scratchie);\n"
"\tmov_l_mr((uae_u32)&regs.pc_oldp,PC_P);\n" "\tmov_l_mr((uintptr)&regs.pc_oldp,PC_P);\n"
"\tm68k_pc_offset=0;\n"); "\tm68k_pc_offset=0;\n");
gen_update_next_handler(); gen_update_next_handler();
break; break;
case i_JMP: case i_JMP:
isjump; isjump;
genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
comprintf("\tmov_l_mr((uae_u32)&regs.pc,srca);\n" comprintf("\tmov_l_mr((uintptr)&regs.pc,srca);\n"
"\tget_n_addr_jmp(srca,PC_P,scratchie);\n" "\tget_n_addr_jmp(srca,PC_P,scratchie);\n"
"\tmov_l_mr((uae_u32)&regs.pc_oldp,PC_P);\n" "\tmov_l_mr((uintptr)&regs.pc_oldp,PC_P);\n"
"\tm68k_pc_offset=0;\n"); "\tm68k_pc_offset=0;\n");
gen_update_next_handler(); gen_update_next_handler();
break; break;
@ -1647,8 +1647,8 @@ gen_opcode (unsigned long int opcode)
comprintf("\tsub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2);\n"); comprintf("\tsub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2);\n");
/* Leave the following as "add" --- it will allow it to be optimized /* Leave the following as "add" --- it will allow it to be optimized
away due to src being a constant ;-) */ away due to src being a constant ;-) */
comprintf("\tadd_l_ri(src,(uae_u32)comp_pc_p);\n"); comprintf("\tadd_l_ri(src,(uintptr)comp_pc_p);\n");
comprintf("\tmov_l_ri(PC_P,(uae_u32)comp_pc_p);\n"); comprintf("\tmov_l_ri(PC_P,(uintptr)comp_pc_p);\n");
/* Now they are both constant. Might as well fold in m68k_pc_offset */ /* Now they are both constant. Might as well fold in m68k_pc_offset */
comprintf("\tadd_l_ri(src,m68k_pc_offset);\n"); comprintf("\tadd_l_ri(src,m68k_pc_offset);\n");
comprintf("\tadd_l_ri(PC_P,m68k_pc_offset);\n"); comprintf("\tadd_l_ri(PC_P,m68k_pc_offset);\n");
@ -1721,7 +1721,7 @@ gen_opcode (unsigned long int opcode)
default: abort(); /* Seems this only comes in word flavour */ default: abort(); /* Seems this only comes in word flavour */
} }
comprintf("\tsub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2);\n"); comprintf("\tsub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2);\n");
comprintf("\tadd_l_ri(offs,(uae_u32)comp_pc_p);\n"); /* New PC, comprintf("\tadd_l_ri(offs,(uintptr)comp_pc_p);\n"); /* New PC,
once the once the
offset_68k is offset_68k is
* also added */ * also added */