Remove the 33-bit addressing hack as it's overly complex for not much gain.

Rather, use an address override prefix (0x67) though Intel Core optimization
reference guide says to avoid LCP prefixes. In practise, impact on performance
is measurably marginal on e.g. Speedometer tests.
This commit is contained in:
gbeauche 2007-01-13 18:21:30 +00:00
parent 9e252b413e
commit 2e95c43bf2
10 changed files with 44 additions and 367 deletions

View File

@ -595,56 +595,6 @@ AC_CACHE_CHECK([whether we can map Low Memory area 0x0000-0x2000],
] ]
) )
dnl Check if we have POSIX shared memory support
AC_CACHE_CHECK([whether POSIX shared memory is working],
ac_cv_have_posix_shm, [
AC_LANG_SAVE
AC_LANG_CPLUSPLUS
AC_TRY_RUN([
#define HAVE_POSIX_SHM
#include "vm_alloc.cpp"
int main(void) { /* returns 0 if we have working POSIX shm */
if (vm_init() < 0) exit(2);
char *m1 = (char *)vm_acquire(32768, VM_MAP_DEFAULT | VM_MAP_33BIT);
if (m1 == VM_MAP_FAILED) exit(3);
vm_exit(); exit(0);
}
], ac_cv_have_posix_shm=yes, ac_cv_have_posix_shm=no,
dnl When cross-compiling, do not assume anything.
ac_cv_have_posix_shm="guessing no"
)
AC_LANG_RESTORE
]
)
AC_TRANSLATE_DEFINE(HAVE_POSIX_SHM, "$ac_cv_have_posix_shm",
[Define if your system supports POSIX shared memory.])
dnl Check if we have working 33-bit memory addressing
AC_CACHE_CHECK([whether 33-bit memory addressing is working],
ac_cv_have_33bit_addressing, [
AC_LANG_SAVE
AC_LANG_CPLUSPLUS
AC_TRY_RUN([
#define USE_33BIT_ADDRESSING 1
#include "vm_alloc.cpp"
int main(void) { /* returns 0 if we have working 33-bit addressing */
if (sizeof(void *) < 8) exit(1);
if (vm_init() < 0) exit(2);
volatile char *m1 = (char *)vm_acquire(32768, VM_MAP_DEFAULT | VM_MAP_33BIT);
if (m1 == VM_MAP_FAILED) exit(3);
volatile char *m2 = m1 + (1L << 32);
m1[0] = 0x12; if (m2[0] != 0x12) exit(4);
m2[0] = 0x34; if (m1[0] != 0x34) exit(5);
vm_exit(); exit(0);
}
], ac_cv_have_33bit_addressing=yes, ac_cv_have_33bit_addressing=no,
dnl When cross-compiling, do not assume anything.
ac_cv_have_33bit_addressing="guessing no"
)
AC_LANG_RESTORE
]
)
dnl Check signal handlers need to be reinstalled dnl Check signal handlers need to be reinstalled
AC_CACHE_CHECK([whether signal handlers need to be reinstalled], AC_CACHE_CHECK([whether signal handlers need to be reinstalled],
ac_cv_signal_need_reinstall, [ ac_cv_signal_need_reinstall, [
@ -1044,7 +994,6 @@ elif [[ "x$HAVE_GCC30" = "xyes" -a "x$HAVE_X86_64" = "xyes" ]]; then
DEFINES="$DEFINES -DX86_64_ASSEMBLY -DOPTIMIZED_FLAGS" DEFINES="$DEFINES -DX86_64_ASSEMBLY -DOPTIMIZED_FLAGS"
JITSRCS="cpuemu1_nf.cpp cpuemu2_nf.cpp cpuemu3_nf.cpp cpuemu4_nf.cpp cpuemu5_nf.cpp cpuemu6_nf.cpp cpuemu7_nf.cpp cpuemu8_nf.cpp $JITSRCS" JITSRCS="cpuemu1_nf.cpp cpuemu2_nf.cpp cpuemu3_nf.cpp cpuemu4_nf.cpp cpuemu5_nf.cpp cpuemu6_nf.cpp cpuemu7_nf.cpp cpuemu8_nf.cpp $JITSRCS"
CAN_JIT=yes CAN_JIT=yes
WANT_33BIT_ADDRESSING=yes
fi fi
elif [[ "x$HAVE_GCC27" = "xyes" -a "x$HAVE_SPARC" = "xyes" -a "x$HAVE_GAS" = "xyes" ]]; then elif [[ "x$HAVE_GCC27" = "xyes" -a "x$HAVE_SPARC" = "xyes" -a "x$HAVE_GAS" = "xyes" ]]; then
dnl SPARC CPU dnl SPARC CPU
@ -1101,13 +1050,6 @@ else
JITSRCS="" JITSRCS=""
fi fi
dnl Use 33-bit memory addressing?
if [[ "$ac_cv_have_33bit_addressing:$WANT_33BIT_ADDRESSING" = "yes:yes" ]]; then
use_33bit_addressing=yes
fi
AC_TRANSLATE_DEFINE(USE_33BIT_ADDRESSING, "$use_33bit_addressing",
[Define to use 33-bit memory addressing on 64-bit JIT capable systems.])
dnl Utility macro used by next two tests. dnl Utility macro used by next two tests.
dnl AC_EXAMINE_OBJECT(C source code, dnl AC_EXAMINE_OBJECT(C source code,
dnl commands examining object file, dnl commands examining object file,

View File

@ -78,7 +78,6 @@ int CPUType;
bool CPUIs68060; bool CPUIs68060;
int FPUType; int FPUType;
bool TwentyFourBitAddressing; bool TwentyFourBitAddressing;
bool ThirtyThreeBitAddressing = false;
// Global variables // Global variables
@ -114,31 +113,15 @@ static bool lm_area_mapped = false; // Flag: Low Memory area mmap()ped
* Helpers to map memory that can be accessed from the Mac side * Helpers to map memory that can be accessed from the Mac side
*/ */
// NOTE: VM_MAP_33BIT is only used when compiling a 64-bit JIT on specific platforms // NOTE: VM_MAP_32BIT is only used when compiling a 64-bit JIT on specific platforms
void *vm_acquire_mac(size_t size) void *vm_acquire_mac(size_t size)
{ {
void *m = vm_acquire(size, VM_MAP_DEFAULT | VM_MAP_33BIT); return vm_acquire(size, VM_MAP_DEFAULT | VM_MAP_32BIT);
#ifdef USE_33BIT_ADDRESSING
if (m == VM_MAP_FAILED) {
printf("WARNING: Cannot acquire memory in 33-bit address space (%s)\n", strerror(errno));
ThirtyThreeBitAddressing = false;
m = vm_acquire(size);
}
#endif
return m;
} }
static int vm_acquire_mac_fixed(void *addr, size_t size) static int vm_acquire_mac_fixed(void *addr, size_t size)
{ {
int ret = vm_acquire_fixed(addr, size, VM_MAP_DEFAULT | VM_MAP_33BIT); return vm_acquire_fixed(addr, size, VM_MAP_DEFAULT | VM_MAP_32BIT);
#ifdef USE_33BIT_ADDRESSING
if (ret < 0) {
printf("WARNING: Cannot acquire fixed memory in 33-bit address space (%s)\n", strerror(errno));
ThirtyThreeBitAddressing = false;
ret = vm_acquire_fixed(addr, size);
}
#endif
return ret;
} }
@ -303,11 +286,6 @@ bool InitEmulator (void)
// Initialize VM system // Initialize VM system
vm_init(); vm_init();
#ifdef USE_33BIT_ADDRESSING
// Speculatively enables 33-bit addressing
ThirtyThreeBitAddressing = true;
#endif
#if REAL_ADDRESSING #if REAL_ADDRESSING
// Flag: RAM and ROM are contigously allocated from address 0 // Flag: RAM and ROM are contigously allocated from address 0
bool memory_mapped_from_zero = false; bool memory_mapped_from_zero = false;

View File

@ -870,56 +870,6 @@ AC_CACHE_CHECK([whether we can map Low Memory area 0x0000-0x2000],
] ]
) )
dnl Check if we have POSIX shared memory support
AC_CACHE_CHECK([whether POSIX shared memory is working],
ac_cv_have_posix_shm, [
AC_LANG_SAVE
AC_LANG_CPLUSPLUS
AC_TRY_RUN([
#define HAVE_POSIX_SHM
#include "vm_alloc.cpp"
int main(void) { /* returns 0 if we have working POSIX shm */
if (vm_init() < 0) exit(2);
char *m1 = (char *)vm_acquire(32768, VM_MAP_DEFAULT | VM_MAP_33BIT);
if (m1 == VM_MAP_FAILED) exit(3);
vm_exit(); exit(0);
}
], ac_cv_have_posix_shm=yes, ac_cv_have_posix_shm=no,
dnl When cross-compiling, do not assume anything.
ac_cv_have_posix_shm="guessing no"
)
AC_LANG_RESTORE
]
)
AC_TRANSLATE_DEFINE(HAVE_POSIX_SHM, "$ac_cv_have_posix_shm",
[Define if your system supports POSIX shared memory.])
dnl Check if we have working 33-bit memory addressing
AC_CACHE_CHECK([whether 33-bit memory addressing is working],
ac_cv_have_33bit_addressing, [
AC_LANG_SAVE
AC_LANG_CPLUSPLUS
AC_TRY_RUN([
#define USE_33BIT_ADDRESSING 1
#include "vm_alloc.cpp"
int main(void) { /* returns 0 if we have working 33-bit addressing */
if (sizeof(void *) < 8) exit(1);
if (vm_init() < 0) exit(2);
volatile char *m1 = (char *)vm_acquire(32768, VM_MAP_DEFAULT | VM_MAP_33BIT);
if (m1 == VM_MAP_FAILED) exit(3);
volatile char *m2 = m1 + (1L << 32);
m1[0] = 0x12; if (m2[0] != 0x12) exit(4);
m2[0] = 0x34; if (m1[0] != 0x34) exit(5);
vm_exit(); exit(0);
}
], ac_cv_have_33bit_addressing=yes, ac_cv_have_33bit_addressing=no,
dnl When cross-compiling, do not assume anything.
ac_cv_have_33bit_addressing="guessing no"
)
AC_LANG_RESTORE
]
)
dnl Check signal handlers need to be reinstalled dnl Check signal handlers need to be reinstalled
AC_CACHE_CHECK([whether signal handlers need to be reinstalled], AC_CACHE_CHECK([whether signal handlers need to be reinstalled],
ac_cv_signal_need_reinstall, [ ac_cv_signal_need_reinstall, [
@ -1341,7 +1291,6 @@ elif [[ "x$HAVE_GCC30" = "xyes" -a "x$HAVE_X86_64" = "xyes" ]]; then
DEFINES="$DEFINES -DX86_64_ASSEMBLY -DOPTIMIZED_FLAGS" DEFINES="$DEFINES -DX86_64_ASSEMBLY -DOPTIMIZED_FLAGS"
JITSRCS="cpuemu1_nf.cpp cpuemu2_nf.cpp cpuemu3_nf.cpp cpuemu4_nf.cpp cpuemu5_nf.cpp cpuemu6_nf.cpp cpuemu7_nf.cpp cpuemu8_nf.cpp $JITSRCS" JITSRCS="cpuemu1_nf.cpp cpuemu2_nf.cpp cpuemu3_nf.cpp cpuemu4_nf.cpp cpuemu5_nf.cpp cpuemu6_nf.cpp cpuemu7_nf.cpp cpuemu8_nf.cpp $JITSRCS"
CAN_JIT=yes CAN_JIT=yes
WANT_33BIT_ADDRESSING=yes
fi fi
elif [[ "x$HAVE_GCC27" = "xyes" -a "x$HAVE_SPARC" = "xyes" -a "x$HAVE_GAS" = "xyes" ]]; then elif [[ "x$HAVE_GCC27" = "xyes" -a "x$HAVE_SPARC" = "xyes" -a "x$HAVE_GAS" = "xyes" ]]; then
dnl SPARC CPU dnl SPARC CPU
@ -1398,13 +1347,6 @@ else
JITSRCS="" JITSRCS=""
fi fi
dnl Use 33-bit memory addressing?
if [[ "$ac_cv_have_33bit_addressing:$WANT_33BIT_ADDRESSING" = "yes:yes" ]]; then
use_33bit_addressing=yes
fi
AC_TRANSLATE_DEFINE(USE_33BIT_ADDRESSING, "$use_33bit_addressing",
[Define to use 33-bit memory addressing on 64-bit JIT capable systems.])
dnl Utility macro used by next two tests. dnl Utility macro used by next two tests.
dnl AC_EXAMINE_OBJECT(C source code, dnl AC_EXAMINE_OBJECT(C source code,
dnl commands examining object file, dnl commands examining object file,

View File

@ -124,7 +124,6 @@ int CPUType;
bool CPUIs68060; bool CPUIs68060;
int FPUType; int FPUType;
bool TwentyFourBitAddressing; bool TwentyFourBitAddressing;
bool ThirtyThreeBitAddressing = false;
// Global variables // Global variables
@ -230,31 +229,15 @@ char *strdup(const char *s)
* Helpers to map memory that can be accessed from the Mac side * Helpers to map memory that can be accessed from the Mac side
*/ */
// NOTE: VM_MAP_33BIT is only used when compiling a 64-bit JIT on specific platforms // NOTE: VM_MAP_32BIT is only used when compiling a 64-bit JIT on specific platforms
void *vm_acquire_mac(size_t size) void *vm_acquire_mac(size_t size)
{ {
void *m = vm_acquire(size, VM_MAP_DEFAULT | VM_MAP_33BIT); return vm_acquire(size, VM_MAP_DEFAULT | VM_MAP_32BIT);
#ifdef USE_33BIT_ADDRESSING
if (m == VM_MAP_FAILED) {
printf("WARNING: Cannot acquire memory in 33-bit address space (%s)\n", strerror(errno));
ThirtyThreeBitAddressing = false;
m = vm_acquire(size);
}
#endif
return m;
} }
static int vm_acquire_mac_fixed(void *addr, size_t size) static int vm_acquire_mac_fixed(void *addr, size_t size)
{ {
int ret = vm_acquire_fixed(addr, size, VM_MAP_DEFAULT | VM_MAP_33BIT); return vm_acquire_fixed(addr, size, VM_MAP_DEFAULT | VM_MAP_32BIT);
#ifdef USE_33BIT_ADDRESSING
if (ret < 0) {
printf("WARNING: Cannot acquire fixed memory in 33-bit address space (%s)\n", strerror(errno));
ThirtyThreeBitAddressing = false;
ret = vm_acquire_fixed(addr, size);
}
#endif
return ret;
} }
@ -559,11 +542,6 @@ int main(int argc, char **argv)
// Initialize VM system // Initialize VM system
vm_init(); vm_init();
#ifdef USE_33BIT_ADDRESSING
// Speculatively enables 33-bit addressing
ThirtyThreeBitAddressing = true;
#endif
#if REAL_ADDRESSING #if REAL_ADDRESSING
// Flag: RAM and ROM are contigously allocated from address 0 // Flag: RAM and ROM are contigously allocated from address 0
bool memory_mapped_from_zero = false; bool memory_mapped_from_zero = false;

View File

@ -88,77 +88,6 @@ static int zero_fd = -1;
#endif #endif
#endif #endif
/* Utility functions for POSIX SHM handling. */
#ifdef USE_33BIT_ADDRESSING
struct shm_range_t {
const char *file;
void *base;
unsigned int size;
shm_range_t *next;
};
static shm_range_t *shm_ranges = NULL;
static bool add_shm_range(const char *file, void *base, unsigned int size)
{
shm_range_t *r = (shm_range_t *)malloc(sizeof(shm_range_t));
if (r) {
r->file = file;
r->base = base;
r->size = size;
r->next = shm_ranges ? shm_ranges : NULL;
shm_ranges = r;
return true;
}
return false;
}
static shm_range_t *find_shm_range(void *base, unsigned int size)
{
for (shm_range_t *r = shm_ranges; r != NULL; r = r->next)
if (r->base == base && r->size == size)
return r;
return NULL;
}
static bool remove_shm_range(shm_range_t *r)
{
if (r) {
for (shm_range_t *p = shm_ranges; p != NULL; p = p->next) {
if (p->next == r) {
p->next = r->next;
free(r);
return true;
}
}
}
return false;
}
static bool remove_shm_range(void *base, unsigned int size)
{
return remove_shm_range(find_shm_range(base, size));
}
#endif
/* Build a POSIX SHM memory segment file descriptor name. */
#ifdef USE_33BIT_ADDRESSING
static const char *build_shm_filename(void)
{
static int id = 0;
static char filename[PATH_MAX];
int ret = snprintf(filename, sizeof(filename), "/BasiliskII-%d-shm-%d", getpid(), id);
if (ret == -1 || ret >= sizeof(filename))
return NULL;
id++;
return filename;
}
#endif
/* Translate generic VM map flags to host values. */ /* Translate generic VM map flags to host values. */
#ifdef HAVE_MMAP_VM #ifdef HAVE_MMAP_VM
@ -260,23 +189,6 @@ void * vm_acquire(size_t size, int options)
int fd = zero_fd; int fd = zero_fd;
int the_map_flags = translate_map_flags(options) | map_flags; int the_map_flags = translate_map_flags(options) | map_flags;
#ifdef USE_33BIT_ADDRESSING
const char *shm_file = NULL;
if (sizeof(void *) == 8 && (options & VM_MAP_33BIT)) {
the_map_flags &= ~(MAP_PRIVATE | MAP_ANON | MAP_ANONYMOUS);
the_map_flags |= MAP_SHARED;
if ((shm_file = build_shm_filename()) == NULL)
return VM_MAP_FAILED;
if ((fd = shm_open(shm_file, O_RDWR | O_CREAT | O_EXCL, 0644)) < 0)
return VM_MAP_FAILED;
if (ftruncate(fd, size) < 0)
return VM_MAP_FAILED;
}
#endif
if ((addr = mmap((caddr_t)next_address, size, VM_PAGE_DEFAULT, the_map_flags, fd, 0)) == (void *)MAP_FAILED) if ((addr = mmap((caddr_t)next_address, size, VM_PAGE_DEFAULT, the_map_flags, fd, 0)) == (void *)MAP_FAILED)
return VM_MAP_FAILED; return VM_MAP_FAILED;
@ -285,18 +197,6 @@ void * vm_acquire(size_t size, int options)
return VM_MAP_FAILED; return VM_MAP_FAILED;
next_address = (char *)addr + size; next_address = (char *)addr + size;
// Remap to 33-bit space
#ifdef USE_33BIT_ADDRESSING
if (sizeof(void *) == 8 && (options & VM_MAP_33BIT)) {
if (!add_shm_range(strdup(shm_file), addr, size))
return VM_MAP_FAILED;
if (mmap((char *)addr + (1L << 32), size, VM_PAGE_DEFAULT, the_map_flags | MAP_FIXED, fd, 0) == (void *)MAP_FAILED)
return VM_MAP_FAILED;
close(fd);
}
#endif
#else #else
#ifdef HAVE_WIN32_VM #ifdef HAVE_WIN32_VM
if ((addr = VirtualAlloc(NULL, size, MEM_RESERVE | MEM_COMMIT, PAGE_EXECUTE_READWRITE)) == NULL) if ((addr = VirtualAlloc(NULL, size, MEM_RESERVE | MEM_COMMIT, PAGE_EXECUTE_READWRITE)) == NULL)
@ -337,37 +237,8 @@ int vm_acquire_fixed(void * addr, size_t size, int options)
int fd = zero_fd; int fd = zero_fd;
int the_map_flags = translate_map_flags(options) | map_flags | MAP_FIXED; int the_map_flags = translate_map_flags(options) | map_flags | MAP_FIXED;
#ifdef USE_33BIT_ADDRESSING
const char *shm_file = NULL;
if (sizeof(void *) == 8 && (options & VM_MAP_33BIT)) {
the_map_flags &= ~(MAP_PRIVATE | MAP_ANON | MAP_ANONYMOUS);
the_map_flags |= MAP_SHARED;
if ((shm_file = build_shm_filename()) == NULL)
return -1;
if ((fd = shm_open(shm_file, O_RDWR | O_CREAT | O_EXCL, 0644)) < 0)
return -1;
if (ftruncate(fd, size) < 0)
return -1;
}
#endif
if (mmap((caddr_t)addr, size, VM_PAGE_DEFAULT, the_map_flags, fd, 0) == (void *)MAP_FAILED) if (mmap((caddr_t)addr, size, VM_PAGE_DEFAULT, the_map_flags, fd, 0) == (void *)MAP_FAILED)
return -1; return -1;
// Remap to 33-bit space
#ifdef USE_33BIT_ADDRESSING
if (sizeof(void *) == 8 && (options & VM_MAP_33BIT)) {
if (!add_shm_range(strdup(shm_file), addr, size))
return -1;
if (mmap((char *)addr + (1L << 32), size, VM_PAGE_DEFAULT, the_map_flags, fd, 0) == (void *)MAP_FAILED)
return -1;
close(fd);
}
#endif
#else #else
#ifdef HAVE_WIN32_VM #ifdef HAVE_WIN32_VM
// Windows cannot allocate Low Memory // Windows cannot allocate Low Memory
@ -411,21 +282,6 @@ int vm_release(void * addr, size_t size)
#ifdef HAVE_MMAP_VM #ifdef HAVE_MMAP_VM
if (munmap((caddr_t)addr, size) != 0) if (munmap((caddr_t)addr, size) != 0)
return -1; return -1;
#ifdef USE_33BIT_ADDRESSING
shm_range_t *r = find_shm_range(addr, size);
if (r) {
if (munmap((char *)r->base + (1L << 32), size) != 0)
return -1;
if (shm_unlink(r->file) < 0)
return -1;
free((char *)r->file);
if (!remove_shm_range(r))
return -1;
}
#endif
#else #else
#ifdef HAVE_WIN32_VM #ifdef HAVE_WIN32_VM
if (VirtualFree(align_addr_segment(addr), 0, MEM_RELEASE) == 0) if (VirtualFree(align_addr_segment(addr), 0, MEM_RELEASE) == 0)

View File

@ -51,7 +51,6 @@ extern "C" {
#define VM_MAP_PRIVATE 0x02 #define VM_MAP_PRIVATE 0x02
#define VM_MAP_FIXED 0x04 #define VM_MAP_FIXED 0x04
#define VM_MAP_32BIT 0x08 #define VM_MAP_32BIT 0x08
#define VM_MAP_33BIT 0x10
/* Default mapping options. */ /* Default mapping options. */
#define VM_MAP_DEFAULT (VM_MAP_PRIVATE) #define VM_MAP_DEFAULT (VM_MAP_PRIVATE)

View File

@ -301,7 +301,6 @@ elif [[ "x$HAVE_GCC30" = "xyes" -a "x$HAVE_X86_64" = "xyes" ]]; then
DEFINES="$DEFINES -DX86_64_ASSEMBLY -DOPTIMIZED_FLAGS" DEFINES="$DEFINES -DX86_64_ASSEMBLY -DOPTIMIZED_FLAGS"
JITSRCS="cpuemu1_nf.cpp cpuemu2_nf.cpp cpuemu3_nf.cpp cpuemu4_nf.cpp cpuemu5_nf.cpp cpuemu6_nf.cpp cpuemu7_nf.cpp cpuemu8_nf.cpp $JITSRCS" JITSRCS="cpuemu1_nf.cpp cpuemu2_nf.cpp cpuemu3_nf.cpp cpuemu4_nf.cpp cpuemu5_nf.cpp cpuemu6_nf.cpp cpuemu7_nf.cpp cpuemu8_nf.cpp $JITSRCS"
CAN_JIT=yes CAN_JIT=yes
WANT_33BIT_ADDRESSING=yes
fi fi
fi fi

View File

@ -73,7 +73,6 @@ int CPUType;
bool CPUIs68060; bool CPUIs68060;
int FPUType; int FPUType;
bool TwentyFourBitAddressing; bool TwentyFourBitAddressing;
bool ThirtyThreeBitAddressing = false;
// Global variables // Global variables
@ -134,12 +133,7 @@ char *strdup(const char *s)
void *vm_acquire_mac(size_t size) void *vm_acquire_mac(size_t size)
{ {
void *m = vm_acquire(size, VM_MAP_DEFAULT | VM_MAP_33BIT); return vm_acquire(size, VM_MAP_DEFAULT | VM_MAP_32BIT);
if (m == NULL) {
ThirtyThreeBitAddressing = false;
m = vm_acquire(size);
}
return m;
} }
@ -356,10 +350,6 @@ int main(int argc, char **argv)
vm_init(); vm_init();
// Create areas for Mac RAM and ROM // Create areas for Mac RAM and ROM
#ifdef USE_33BIT_ADDRESSING
// Speculatively enables 33-bit addressing
ThirtyThreeBitAddressing = true;
#endif
RAMBaseHost = (uint8 *)vm_acquire_mac(RAMSize); RAMBaseHost = (uint8 *)vm_acquire_mac(RAMSize);
ROMBaseHost = (uint8 *)vm_acquire_mac(0x100000); ROMBaseHost = (uint8 *)vm_acquire_mac(0x100000);
if (RAMBaseHost == VM_MAP_FAILED || ROMBaseHost == VM_MAP_FAILED) { if (RAMBaseHost == VM_MAP_FAILED || ROMBaseHost == VM_MAP_FAILED) {

View File

@ -169,6 +169,12 @@ static const uae_u8 need_to_preserve[]={0,0,0,1,0,1,1,1};
#if defined(__x86_64__) #if defined(__x86_64__)
#define X86_TARGET_64BIT 1 #define X86_TARGET_64BIT 1
/* The address override prefix causes a 5 cycles penalty on Intel Core
processors. Another solution would be to decompose the load in an LEA,
MOV (to zero-extend), MOV (from memory): is it better? */
#define ADDR32 x86_emit_byte(0x67),
#else
#define ADDR32 /**/
#endif #endif
#define X86_FLAT_REGISTERS 0 #define X86_FLAT_REGISTERS 0
#define X86_OPTIMIZE_ALU 1 #define X86_OPTIMIZE_ALU 1
@ -616,93 +622,93 @@ LENDFUNC(NONE,NONE,2,raw_mov_w_rr,(W2 d, R2 s))
LOWFUNC(NONE,READ,4,raw_mov_l_rrm_indexed,(W4 d,R4 baser, R4 index, IMM factor)) LOWFUNC(NONE,READ,4,raw_mov_l_rrm_indexed,(W4 d,R4 baser, R4 index, IMM factor))
{ {
MOVLmr(0, baser, index, factor, d); ADDR32 MOVLmr(0, baser, index, factor, d);
} }
LENDFUNC(NONE,READ,4,raw_mov_l_rrm_indexed,(W4 d,R4 baser, R4 index, IMM factor)) LENDFUNC(NONE,READ,4,raw_mov_l_rrm_indexed,(W4 d,R4 baser, R4 index, IMM factor))
LOWFUNC(NONE,READ,4,raw_mov_w_rrm_indexed,(W2 d, R4 baser, R4 index, IMM factor)) LOWFUNC(NONE,READ,4,raw_mov_w_rrm_indexed,(W2 d, R4 baser, R4 index, IMM factor))
{ {
MOVWmr(0, baser, index, factor, d); ADDR32 MOVWmr(0, baser, index, factor, d);
} }
LENDFUNC(NONE,READ,4,raw_mov_w_rrm_indexed,(W2 d, R4 baser, R4 index, IMM factor)) LENDFUNC(NONE,READ,4,raw_mov_w_rrm_indexed,(W2 d, R4 baser, R4 index, IMM factor))
LOWFUNC(NONE,READ,4,raw_mov_b_rrm_indexed,(W1 d, R4 baser, R4 index, IMM factor)) LOWFUNC(NONE,READ,4,raw_mov_b_rrm_indexed,(W1 d, R4 baser, R4 index, IMM factor))
{ {
MOVBmr(0, baser, index, factor, d); ADDR32 MOVBmr(0, baser, index, factor, d);
} }
LENDFUNC(NONE,READ,4,raw_mov_b_rrm_indexed,(W1 d, R4 baser, R4 index, IMM factor)) LENDFUNC(NONE,READ,4,raw_mov_b_rrm_indexed,(W1 d, R4 baser, R4 index, IMM factor))
LOWFUNC(NONE,WRITE,4,raw_mov_l_mrr_indexed,(R4 baser, R4 index, IMM factor, R4 s)) LOWFUNC(NONE,WRITE,4,raw_mov_l_mrr_indexed,(R4 baser, R4 index, IMM factor, R4 s))
{ {
MOVLrm(s, 0, baser, index, factor); ADDR32 MOVLrm(s, 0, baser, index, factor);
} }
LENDFUNC(NONE,WRITE,4,raw_mov_l_mrr_indexed,(R4 baser, R4 index, IMM factor, R4 s)) LENDFUNC(NONE,WRITE,4,raw_mov_l_mrr_indexed,(R4 baser, R4 index, IMM factor, R4 s))
LOWFUNC(NONE,WRITE,4,raw_mov_w_mrr_indexed,(R4 baser, R4 index, IMM factor, R2 s)) LOWFUNC(NONE,WRITE,4,raw_mov_w_mrr_indexed,(R4 baser, R4 index, IMM factor, R2 s))
{ {
MOVWrm(s, 0, baser, index, factor); ADDR32 MOVWrm(s, 0, baser, index, factor);
} }
LENDFUNC(NONE,WRITE,4,raw_mov_w_mrr_indexed,(R4 baser, R4 index, IMM factor, R2 s)) LENDFUNC(NONE,WRITE,4,raw_mov_w_mrr_indexed,(R4 baser, R4 index, IMM factor, R2 s))
LOWFUNC(NONE,WRITE,4,raw_mov_b_mrr_indexed,(R4 baser, R4 index, IMM factor, R1 s)) LOWFUNC(NONE,WRITE,4,raw_mov_b_mrr_indexed,(R4 baser, R4 index, IMM factor, R1 s))
{ {
MOVBrm(s, 0, baser, index, factor); ADDR32 MOVBrm(s, 0, baser, index, factor);
} }
LENDFUNC(NONE,WRITE,4,raw_mov_b_mrr_indexed,(R4 baser, R4 index, IMM factor, R1 s)) LENDFUNC(NONE,WRITE,4,raw_mov_b_mrr_indexed,(R4 baser, R4 index, IMM factor, R1 s))
LOWFUNC(NONE,WRITE,5,raw_mov_l_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R4 s)) LOWFUNC(NONE,WRITE,5,raw_mov_l_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R4 s))
{ {
MOVLrm(s, base, baser, index, factor); ADDR32 MOVLrm(s, base, baser, index, factor);
} }
LENDFUNC(NONE,WRITE,5,raw_mov_l_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R4 s)) LENDFUNC(NONE,WRITE,5,raw_mov_l_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R4 s))
LOWFUNC(NONE,WRITE,5,raw_mov_w_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R2 s)) LOWFUNC(NONE,WRITE,5,raw_mov_w_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R2 s))
{ {
MOVWrm(s, base, baser, index, factor); ADDR32 MOVWrm(s, base, baser, index, factor);
} }
LENDFUNC(NONE,WRITE,5,raw_mov_w_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R2 s)) LENDFUNC(NONE,WRITE,5,raw_mov_w_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R2 s))
LOWFUNC(NONE,WRITE,5,raw_mov_b_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R1 s)) LOWFUNC(NONE,WRITE,5,raw_mov_b_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R1 s))
{ {
MOVBrm(s, base, baser, index, factor); ADDR32 MOVBrm(s, base, baser, index, factor);
} }
LENDFUNC(NONE,WRITE,5,raw_mov_b_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R1 s)) LENDFUNC(NONE,WRITE,5,raw_mov_b_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R1 s))
LOWFUNC(NONE,READ,5,raw_mov_l_brrm_indexed,(W4 d, IMM base, R4 baser, R4 index, IMM factor)) LOWFUNC(NONE,READ,5,raw_mov_l_brrm_indexed,(W4 d, IMM base, R4 baser, R4 index, IMM factor))
{ {
MOVLmr(base, baser, index, factor, d); ADDR32 MOVLmr(base, baser, index, factor, d);
} }
LENDFUNC(NONE,READ,5,raw_mov_l_brrm_indexed,(W4 d, IMM base, R4 baser, R4 index, IMM factor)) LENDFUNC(NONE,READ,5,raw_mov_l_brrm_indexed,(W4 d, IMM base, R4 baser, R4 index, IMM factor))
LOWFUNC(NONE,READ,5,raw_mov_w_brrm_indexed,(W2 d, IMM base, R4 baser, R4 index, IMM factor)) LOWFUNC(NONE,READ,5,raw_mov_w_brrm_indexed,(W2 d, IMM base, R4 baser, R4 index, IMM factor))
{ {
MOVWmr(base, baser, index, factor, d); ADDR32 MOVWmr(base, baser, index, factor, d);
} }
LENDFUNC(NONE,READ,5,raw_mov_w_brrm_indexed,(W2 d, IMM base, R4 baser, R4 index, IMM factor)) LENDFUNC(NONE,READ,5,raw_mov_w_brrm_indexed,(W2 d, IMM base, R4 baser, R4 index, IMM factor))
LOWFUNC(NONE,READ,5,raw_mov_b_brrm_indexed,(W1 d, IMM base, R4 baser, R4 index, IMM factor)) LOWFUNC(NONE,READ,5,raw_mov_b_brrm_indexed,(W1 d, IMM base, R4 baser, R4 index, IMM factor))
{ {
MOVBmr(base, baser, index, factor, d); ADDR32 MOVBmr(base, baser, index, factor, d);
} }
LENDFUNC(NONE,READ,5,raw_mov_b_brrm_indexed,(W1 d, IMM base, R4 baser, R4 index, IMM factor)) LENDFUNC(NONE,READ,5,raw_mov_b_brrm_indexed,(W1 d, IMM base, R4 baser, R4 index, IMM factor))
LOWFUNC(NONE,READ,4,raw_mov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor)) LOWFUNC(NONE,READ,4,raw_mov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor))
{ {
MOVLmr(base, X86_NOREG, index, factor, d); ADDR32 MOVLmr(base, X86_NOREG, index, factor, d);
} }
LENDFUNC(NONE,READ,4,raw_mov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor)) LENDFUNC(NONE,READ,4,raw_mov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor))
LOWFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond)) LOWFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond))
{ {
if (have_cmov) if (have_cmov)
CMOVLmr(cond, base, X86_NOREG, index, factor, d); ADDR32 CMOVLmr(cond, base, X86_NOREG, index, factor, d);
else { /* replacement using branch and mov */ else { /* replacement using branch and mov */
#if defined(__x86_64__) #if defined(__x86_64__)
write_log("x86-64 implementations are bound to have CMOV!\n"); write_log("x86-64 implementations are bound to have CMOV!\n");
abort(); abort();
#endif #endif
JCCSii(cond^1, 7); JCCSii(cond^1, 7);
MOVLmr(base, X86_NOREG, index, factor, d); ADDR32 MOVLmr(base, X86_NOREG, index, factor, d);
} }
} }
LENDFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond)) LENDFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond))
@ -724,73 +730,73 @@ LENDFUNC(NONE,READ,3,raw_cmov_l_rm,(W4 d, IMM mem, IMM cond))
LOWFUNC(NONE,READ,3,raw_mov_l_rR,(W4 d, R4 s, IMM offset)) LOWFUNC(NONE,READ,3,raw_mov_l_rR,(W4 d, R4 s, IMM offset))
{ {
MOVLmr(offset, s, X86_NOREG, 1, d); ADDR32 MOVLmr(offset, s, X86_NOREG, 1, d);
} }
LENDFUNC(NONE,READ,3,raw_mov_l_rR,(W4 d, R4 s, IMM offset)) LENDFUNC(NONE,READ,3,raw_mov_l_rR,(W4 d, R4 s, IMM offset))
LOWFUNC(NONE,READ,3,raw_mov_w_rR,(W2 d, R4 s, IMM offset)) LOWFUNC(NONE,READ,3,raw_mov_w_rR,(W2 d, R4 s, IMM offset))
{ {
MOVWmr(offset, s, X86_NOREG, 1, d); ADDR32 MOVWmr(offset, s, X86_NOREG, 1, d);
} }
LENDFUNC(NONE,READ,3,raw_mov_w_rR,(W2 d, R4 s, IMM offset)) LENDFUNC(NONE,READ,3,raw_mov_w_rR,(W2 d, R4 s, IMM offset))
LOWFUNC(NONE,READ,3,raw_mov_b_rR,(W1 d, R4 s, IMM offset)) LOWFUNC(NONE,READ,3,raw_mov_b_rR,(W1 d, R4 s, IMM offset))
{ {
MOVBmr(offset, s, X86_NOREG, 1, d); ADDR32 MOVBmr(offset, s, X86_NOREG, 1, d);
} }
LENDFUNC(NONE,READ,3,raw_mov_b_rR,(W1 d, R4 s, IMM offset)) LENDFUNC(NONE,READ,3,raw_mov_b_rR,(W1 d, R4 s, IMM offset))
LOWFUNC(NONE,READ,3,raw_mov_l_brR,(W4 d, R4 s, IMM offset)) LOWFUNC(NONE,READ,3,raw_mov_l_brR,(W4 d, R4 s, IMM offset))
{ {
MOVLmr(offset, s, X86_NOREG, 1, d); ADDR32 MOVLmr(offset, s, X86_NOREG, 1, d);
} }
LENDFUNC(NONE,READ,3,raw_mov_l_brR,(W4 d, R4 s, IMM offset)) LENDFUNC(NONE,READ,3,raw_mov_l_brR,(W4 d, R4 s, IMM offset))
LOWFUNC(NONE,READ,3,raw_mov_w_brR,(W2 d, R4 s, IMM offset)) LOWFUNC(NONE,READ,3,raw_mov_w_brR,(W2 d, R4 s, IMM offset))
{ {
MOVWmr(offset, s, X86_NOREG, 1, d); ADDR32 MOVWmr(offset, s, X86_NOREG, 1, d);
} }
LENDFUNC(NONE,READ,3,raw_mov_w_brR,(W2 d, R4 s, IMM offset)) LENDFUNC(NONE,READ,3,raw_mov_w_brR,(W2 d, R4 s, IMM offset))
LOWFUNC(NONE,READ,3,raw_mov_b_brR,(W1 d, R4 s, IMM offset)) LOWFUNC(NONE,READ,3,raw_mov_b_brR,(W1 d, R4 s, IMM offset))
{ {
MOVBmr(offset, s, X86_NOREG, 1, d); ADDR32 MOVBmr(offset, s, X86_NOREG, 1, d);
} }
LENDFUNC(NONE,READ,3,raw_mov_b_brR,(W1 d, R4 s, IMM offset)) LENDFUNC(NONE,READ,3,raw_mov_b_brR,(W1 d, R4 s, IMM offset))
LOWFUNC(NONE,WRITE,3,raw_mov_l_Ri,(R4 d, IMM i, IMM offset)) LOWFUNC(NONE,WRITE,3,raw_mov_l_Ri,(R4 d, IMM i, IMM offset))
{ {
MOVLim(i, offset, d, X86_NOREG, 1); ADDR32 MOVLim(i, offset, d, X86_NOREG, 1);
} }
LENDFUNC(NONE,WRITE,3,raw_mov_l_Ri,(R4 d, IMM i, IMM offset)) LENDFUNC(NONE,WRITE,3,raw_mov_l_Ri,(R4 d, IMM i, IMM offset))
LOWFUNC(NONE,WRITE,3,raw_mov_w_Ri,(R4 d, IMM i, IMM offset)) LOWFUNC(NONE,WRITE,3,raw_mov_w_Ri,(R4 d, IMM i, IMM offset))
{ {
MOVWim(i, offset, d, X86_NOREG, 1); ADDR32 MOVWim(i, offset, d, X86_NOREG, 1);
} }
LENDFUNC(NONE,WRITE,3,raw_mov_w_Ri,(R4 d, IMM i, IMM offset)) LENDFUNC(NONE,WRITE,3,raw_mov_w_Ri,(R4 d, IMM i, IMM offset))
LOWFUNC(NONE,WRITE,3,raw_mov_b_Ri,(R4 d, IMM i, IMM offset)) LOWFUNC(NONE,WRITE,3,raw_mov_b_Ri,(R4 d, IMM i, IMM offset))
{ {
MOVBim(i, offset, d, X86_NOREG, 1); ADDR32 MOVBim(i, offset, d, X86_NOREG, 1);
} }
LENDFUNC(NONE,WRITE,3,raw_mov_b_Ri,(R4 d, IMM i, IMM offset)) LENDFUNC(NONE,WRITE,3,raw_mov_b_Ri,(R4 d, IMM i, IMM offset))
LOWFUNC(NONE,WRITE,3,raw_mov_l_Rr,(R4 d, R4 s, IMM offset)) LOWFUNC(NONE,WRITE,3,raw_mov_l_Rr,(R4 d, R4 s, IMM offset))
{ {
MOVLrm(s, offset, d, X86_NOREG, 1); ADDR32 MOVLrm(s, offset, d, X86_NOREG, 1);
} }
LENDFUNC(NONE,WRITE,3,raw_mov_l_Rr,(R4 d, R4 s, IMM offset)) LENDFUNC(NONE,WRITE,3,raw_mov_l_Rr,(R4 d, R4 s, IMM offset))
LOWFUNC(NONE,WRITE,3,raw_mov_w_Rr,(R4 d, R2 s, IMM offset)) LOWFUNC(NONE,WRITE,3,raw_mov_w_Rr,(R4 d, R2 s, IMM offset))
{ {
MOVWrm(s, offset, d, X86_NOREG, 1); ADDR32 MOVWrm(s, offset, d, X86_NOREG, 1);
} }
LENDFUNC(NONE,WRITE,3,raw_mov_w_Rr,(R4 d, R2 s, IMM offset)) LENDFUNC(NONE,WRITE,3,raw_mov_w_Rr,(R4 d, R2 s, IMM offset))
LOWFUNC(NONE,WRITE,3,raw_mov_b_Rr,(R4 d, R1 s, IMM offset)) LOWFUNC(NONE,WRITE,3,raw_mov_b_Rr,(R4 d, R1 s, IMM offset))
{ {
MOVBrm(s, offset, d, X86_NOREG, 1); ADDR32 MOVBrm(s, offset, d, X86_NOREG, 1);
} }
LENDFUNC(NONE,WRITE,3,raw_mov_b_Rr,(R4 d, R1 s, IMM offset)) LENDFUNC(NONE,WRITE,3,raw_mov_b_Rr,(R4 d, R1 s, IMM offset))
@ -814,19 +820,19 @@ LENDFUNC(NONE,NONE,4,raw_lea_l_rr_indexed,(W4 d, R4 s, R4 index, IMM factor))
LOWFUNC(NONE,WRITE,3,raw_mov_l_bRr,(R4 d, R4 s, IMM offset)) LOWFUNC(NONE,WRITE,3,raw_mov_l_bRr,(R4 d, R4 s, IMM offset))
{ {
MOVLrm(s, offset, d, X86_NOREG, 1); ADDR32 MOVLrm(s, offset, d, X86_NOREG, 1);
} }
LENDFUNC(NONE,WRITE,3,raw_mov_l_bRr,(R4 d, R4 s, IMM offset)) LENDFUNC(NONE,WRITE,3,raw_mov_l_bRr,(R4 d, R4 s, IMM offset))
LOWFUNC(NONE,WRITE,3,raw_mov_w_bRr,(R4 d, R2 s, IMM offset)) LOWFUNC(NONE,WRITE,3,raw_mov_w_bRr,(R4 d, R2 s, IMM offset))
{ {
MOVWrm(s, offset, d, X86_NOREG, 1); ADDR32 MOVWrm(s, offset, d, X86_NOREG, 1);
} }
LENDFUNC(NONE,WRITE,3,raw_mov_w_bRr,(R4 d, R2 s, IMM offset)) LENDFUNC(NONE,WRITE,3,raw_mov_w_bRr,(R4 d, R2 s, IMM offset))
LOWFUNC(NONE,WRITE,3,raw_mov_b_bRr,(R4 d, R1 s, IMM offset)) LOWFUNC(NONE,WRITE,3,raw_mov_b_bRr,(R4 d, R1 s, IMM offset))
{ {
MOVBrm(s, offset, d, X86_NOREG, 1); ADDR32 MOVBrm(s, offset, d, X86_NOREG, 1);
} }
LENDFUNC(NONE,WRITE,3,raw_mov_b_bRr,(R4 d, R1 s, IMM offset)) LENDFUNC(NONE,WRITE,3,raw_mov_b_bRr,(R4 d, R1 s, IMM offset))
@ -1144,7 +1150,7 @@ LENDFUNC(WRITE,NONE,2,raw_cmp_b,(R1 d, R1 s))
LOWFUNC(WRITE,READ,4,raw_cmp_l_rm_indexed,(R4 d, IMM offset, R4 index, IMM factor)) LOWFUNC(WRITE,READ,4,raw_cmp_l_rm_indexed,(R4 d, IMM offset, R4 index, IMM factor))
{ {
CMPLmr(offset, X86_NOREG, index, factor, d); ADDR32 CMPLmr(offset, X86_NOREG, index, factor, d);
} }
LENDFUNC(WRITE,READ,4,raw_cmp_l_rm_indexed,(R4 d, IMM offset, R4 index, IMM factor)) LENDFUNC(WRITE,READ,4,raw_cmp_l_rm_indexed,(R4 d, IMM offset, R4 index, IMM factor))

View File

@ -137,9 +137,6 @@ static compop_func *nfcompfunctbl[65536];
static cpuop_func *nfcpufunctbl[65536]; static cpuop_func *nfcpufunctbl[65536];
uae_u8* comp_pc_p; uae_u8* comp_pc_p;
// From main_unix.cpp
extern bool ThirtyThreeBitAddressing;
// From newcpu.cpp // From newcpu.cpp
extern bool quit_program; extern bool quit_program;
@ -5446,11 +5443,6 @@ static void writemem_real(int address, int source, int size, int tmp, int clobbe
if (clobber) if (clobber)
f=source; f=source;
#if SIZEOF_VOID_P == 8
if (!ThirtyThreeBitAddressing)
sign_extend_32_rr(address, address);
#endif
switch(size) { switch(size) {
case 1: mov_b_bRr(address,source,MEMBaseDiff); break; case 1: mov_b_bRr(address,source,MEMBaseDiff); break;
case 2: mov_w_rr(f,source); bswap_16(f); mov_w_bRr(address,f,MEMBaseDiff); break; case 2: mov_w_rr(f,source); bswap_16(f); mov_w_bRr(address,f,MEMBaseDiff); break;
@ -5510,11 +5502,6 @@ static void readmem_real(int address, int dest, int size, int tmp)
if (size==4 && address!=dest) if (size==4 && address!=dest)
f=dest; f=dest;
#if SIZEOF_VOID_P == 8
if (!ThirtyThreeBitAddressing)
sign_extend_32_rr(address, address);
#endif
switch(size) { switch(size) {
case 1: mov_b_brR(dest,address,MEMBaseDiff); break; case 1: mov_b_brR(dest,address,MEMBaseDiff); break;
case 2: mov_w_brR(dest,address,MEMBaseDiff); bswap_16(dest); break; case 2: mov_w_brR(dest,address,MEMBaseDiff); bswap_16(dest); break;